From 238486884e74888d32d64ea9d934ba6b07e79eb2 Mon Sep 17 00:00:00 2001 From: Timothy Arceri Date: Wed, 9 Nov 2016 23:44:39 +1100 Subject: [PATCH] i965: make use of new is_arb_asm flag Reviewed-by: Eric Anholt --- src/mesa/drivers/dri/i965/brw_vs.c | 11 +++++------ src/mesa/drivers/dri/i965/brw_wm.c | 13 ++++++------- 2 files changed, 11 insertions(+), 13 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index 70373504c93..cfba77842ca 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -156,7 +156,7 @@ brw_codegen_vs_prog(struct brw_context *brw, memset(&prog_data, 0, sizeof(prog_data)); /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */ - if (!prog) + if (vp->program.is_arb_asm) stage_prog_data->use_alt_mode = true; mem_ctx = ralloc_context(NULL); @@ -186,7 +186,7 @@ brw_codegen_vs_prog(struct brw_context *brw, stage_prog_data->nr_image_params); stage_prog_data->nr_params = param_count; - if (prog) { + if (!vp->program.is_arb_asm) { brw_nir_setup_glsl_uniforms(vp->program.nir, &vp->program, &prog_data.base.base, compiler->scalar_stage[MESA_SHADER_VERTEX]); @@ -219,15 +219,14 @@ brw_codegen_vs_prog(struct brw_context *brw, } if (unlikely(INTEL_DEBUG & DEBUG_VS)) { - if (!prog) + if (vp->program.is_arb_asm) brw_dump_arb_asm("vertex", &vp->program); } int st_index = -1; if (INTEL_DEBUG & DEBUG_SHADER_TIME) { - bool is_glsl_sh = prog != NULL; st_index = brw_get_shader_time_index(brw, &vp->program, ST_VS, - is_glsl_sh); + !vp->program.is_arb_asm); } /* Emit GEN4 code. @@ -239,7 +238,7 @@ brw_codegen_vs_prog(struct brw_context *brw, !_mesa_is_gles3(&brw->ctx), st_index, &program_size, &error_str); if (program == NULL) { - if (prog) { + if (!vp->program.is_arb_asm) { vp->program.sh.data->LinkStatus = false; ralloc_strcat(&vp->program.sh.data->InfoLog, error_str); } diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 7a2cf9b84d6..6ada9b4d48d 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -151,7 +151,7 @@ brw_codegen_wm_prog(struct brw_context *brw, memset(&prog_data, 0, sizeof(prog_data)); /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */ - if (!prog) + if (fp->program.is_arb_asm) prog_data.base.use_alt_mode = true; assign_fs_binding_table_offsets(devinfo, &fp->program, key, &prog_data); @@ -173,7 +173,7 @@ brw_codegen_wm_prog(struct brw_context *brw, prog_data.base.nr_image_params); prog_data.base.nr_params = param_count; - if (prog) { + if (!fp->program.is_arb_asm) { brw_nir_setup_glsl_uniforms(fp->program.nir, &fp->program, &prog_data.base, true); } else { @@ -192,11 +192,10 @@ brw_codegen_wm_prog(struct brw_context *brw, int st_index8 = -1, st_index16 = -1; if (INTEL_DEBUG & DEBUG_SHADER_TIME) { - bool is_glsl_sh = prog != NULL; st_index8 = brw_get_shader_time_index(brw, &fp->program, ST_FS8, - is_glsl_sh); + !fp->program.is_arb_asm); st_index16 = brw_get_shader_time_index(brw, &fp->program, ST_FS16, - is_glsl_sh); + !fp->program.is_arb_asm); } char *error_str = NULL; @@ -207,7 +206,7 @@ brw_codegen_wm_prog(struct brw_context *brw, &program_size, &error_str); if (program == NULL) { - if (prog) { + if (!fp->program.is_arb_asm) { fp->program.sh.data->LinkStatus = false; ralloc_strcat(&fp->program.sh.data->InfoLog, error_str); } @@ -233,7 +232,7 @@ brw_codegen_wm_prog(struct brw_context *brw, prog_data.base.total_scratch, devinfo->max_wm_threads); - if (unlikely((INTEL_DEBUG & DEBUG_WM) && !prog)) + if (unlikely((INTEL_DEBUG & DEBUG_WM) && fp->program.is_arb_asm)) fprintf(stderr, "\n"); brw_upload_cache(&brw->cache, BRW_CACHE_FS_PROG, -- 2.30.2