From 23acefb14efe20c8fd9421793a555fa6bf40c75e Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Mon, 29 Oct 2018 16:02:25 +0100 Subject: [PATCH] boards/targets/versaecp55g_prjtrellis: simple.py example working, specific target no longer needed simple.py configuration tested: python3 simple.py --cpu-type=lm32 --gateware-toolchain=prjtrellis litex.boards.platforms.versaecp55g python3 simple.py --cpu-type=vexriscv --gateware-toolchain=prjtrellis litex.boards.platforms.versaecp55g --- .../boards/targets/versaecp55g_prjtrellis.py | 32 ------------------- 1 file changed, 32 deletions(-) delete mode 100755 litex/boards/targets/versaecp55g_prjtrellis.py diff --git a/litex/boards/targets/versaecp55g_prjtrellis.py b/litex/boards/targets/versaecp55g_prjtrellis.py deleted file mode 100755 index 47c2a585..00000000 --- a/litex/boards/targets/versaecp55g_prjtrellis.py +++ /dev/null @@ -1,32 +0,0 @@ -#!/usr/bin/env python3 - -from migen import * - -from litex.boards.platforms import versaecp55g - -from litex.soc.integration.builder import * - - -class BaseSoC(Module): - def __init__(self, platform): - self.clock_domains.cd_sys = ClockDomain() - - # crg - self.comb += self.cd_sys.clk.eq(platform.request("clk100")) - - # led0 (blink) - counter = Signal(32) - self.sync += counter.eq(counter + 1) - self.comb += platform.request("user_led", 0).eq(counter[26]) - - # led1 (btn) - self.comb += platform.request("user_led", 1).eq(platform.request("user_dip_btn", 0)) - -def main(): - platform = versaecp55g.Platform(toolchain="prjtrellis") - soc = BaseSoC(platform) - platform.build(soc, toolchain_path="/home/florent/dev/symbiflow/prjtrellis") # FIXME - - -if __name__ == "__main__": - main() -- 2.30.2