From 23e7c3f4a1ce830549352f2de247e77c63d97e4d Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 26 Mar 2022 23:57:19 +0000 Subject: [PATCH] --- openpower/sv/cr_int_predication.mdwn | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn index 87464645b..ae41ea98c 100644 --- a/openpower/sv/cr_int_predication.mdwn +++ b/openpower/sv/cr_int_predication.mdwn @@ -236,11 +236,11 @@ there are additional setb conditional instructions in v3.1 (p129) RT = (CR[BI] == 1) ? 1 : 0 -which also negate that, and also return -1 / 0. these are similar yo crweird but not the same purpose. most notable is that crweird acts on CR fields rather than the entire 32 bit CR. +which also negate that, and also return -1 / 0. these are similar to crweird but not the same purpose. most notable is that crweird acts on CR fields rather than the entire 32 bit CR. # Predication Examples -let us take the following example: +Take the following example: r10 = 0b00010 sv.mtcrweird/dm=r10/dz cr8.v, 0, 0b0011.0000 -- 2.30.2