From 2418c82dfa39d4b7eba9496341ba895848f21aa4 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 31 Oct 2018 14:26:59 +0000 Subject: [PATCH] convert sv_proc_t::f128 to sv_freg_t type so it carries reg_spec_t state --- riscv/sv_insn_redirect.cc | 5 ++--- riscv/sv_insn_redirect.h | 2 +- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc index b4bf2e7..9a67a73 100644 --- a/riscv/sv_insn_redirect.cc +++ b/riscv/sv_insn_redirect.cc @@ -612,9 +612,9 @@ sv_float64_t (sv_proc_t::f64)(sv_reg_t const& v) return ::f64(x); } -sv_float128_t sv_proc_t::f128( float128_t v) +sv_float128_t sv_proc_t::f128( sv_freg_t v) { -/* + uint64_t x = ((float128_t)v).v[0]; switch (v.get_elwidth()) { // 8-bit @@ -634,7 +634,6 @@ sv_float128_t sv_proc_t::f128( float128_t v) } default: break; } -*/ return ::f128(v); } diff --git a/riscv/sv_insn_redirect.h b/riscv/sv_insn_redirect.h index 90a71de..b08840d 100644 --- a/riscv/sv_insn_redirect.h +++ b/riscv/sv_insn_redirect.h @@ -149,7 +149,7 @@ public: sv_reg_t sv_reg_int32(sv_reg_t const&); // used in conversion of regs FRSn - sv_float128_t (f128)(float128_t v); + sv_float128_t (f128)(sv_freg_t v); sv_float64_t (f64)(sv_freg_t v); sv_float32_t (f32)(sv_freg_t v); -- 2.30.2