From 2450cf7eb346816f37fc02ece1591325c9fb97d8 Mon Sep 17 00:00:00 2001
From: Dmitry Selyutin <ghostmansd@gmail.com>
Date: Fri, 12 May 2023 12:09:46 +0000
Subject: [PATCH] pysvp64asm: switch to common assembly routine

---
 src/openpower/sv/trans/svp64.py | 59 +++++----------------------------
 1 file changed, 9 insertions(+), 50 deletions(-)

diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py
index e5a59ffc..2fbeb614 100644
--- a/src/openpower/sv/trans/svp64.py
+++ b/src/openpower/sv/trans/svp64.py
@@ -28,10 +28,10 @@ from openpower.decoder.pseudo.pagereader import ISA
 from openpower.decoder.power_svp64 import SVP64RM, get_regtype, decode_extra
 from openpower.decoder.selectable_int import SelectableInt
 from openpower.consts import SVP64MODE
-from openpower.decoder.power_insn import SVP64Instruction
+from openpower.decoder.power_insn import AssemblerError
+from openpower.decoder.power_insn import ByteOrder
 from openpower.decoder.power_insn import Database
 from openpower.decoder.power_insn import Style
-from openpower.decoder.power_insn import WordInstruction
 from openpower.decoder.power_enums import find_wiki_dir
 
 # for debug logging
@@ -41,10 +41,6 @@ from openpower.util import log
 DB = Database(find_wiki_dir())
 
 
-class AssemblerError(ValueError):
-    pass
-
-
 # decodes svp64 assembly listings and creates EXT001 svp64 prefixes
 class SVP64Asm:
     def __init__(self, lst, bigendian=False, macros=None):
@@ -64,50 +60,14 @@ class SVP64Asm:
         if macros is None:
             macros = {}
         macros.update(self.macros)
-        isa = self.isa
-        svp64 = self.svp64
-        insn_no_comments = insn.partition('#')[0].strip()
-        if not insn_no_comments:
-            return
-
-        # find first space, to get opcode
-        ls = insn_no_comments.split()
-        opcode = ls[0]
-        # now find opcode fields
-        fields = ''.join(ls[1:]).split(',')
-        mfields = list(filter(bool, map(str.strip, fields)))
-        log("opcode, fields", ls, opcode, mfields)
-        fields = []
-        # macro substitution
-        for field in mfields:
-            fields.append(macro_subst(macros, field))
-        log("opcode, fields substed", ls, opcode, fields)
-
-        # identify if it is a word instruction
-        record = DB[opcode]
-        if record is not None:
-            insn = WordInstruction.assemble(record=record, arguments=fields)
-            yield from insn.disassemble(record=record, style=Style.LEGACY)
-            return
 
-        # identify if is a svp64 mnemonic
-        if not opcode.startswith('sv.'):
-            yield insn  # unaltered
-            return
-        opcode = opcode[3:]  # strip leading "sv"
-
-        # start working on decoding the svp64 op: sv.basev30Bop/vec2/mode
-        opmodes = opcode.split("/")  # split at "/"
-        v30b_op = opmodes.pop(0)    # first is the v3.0B
-
-        record = DB[v30b_op]
-        if record is not None:
-            insn = SVP64Instruction.assemble(record=record,
-                arguments=fields, specifiers=opmodes)
-            yield from insn.disassemble(record=record, style=Style.LEGACY)
-            return
-
-        raise AssemblerError(insn_no_comments)
+        try:
+            insn = DB.assemble(insn=insn, macros=self.macros)
+            yield "; ".join(DB.disassemble(insn=insn,
+                byteorder=ByteOrder.LITTLE,
+                style=Style.LEGACY))
+        except AssemblerError:
+            yield insn
 
     def translate(self, lst):
         for insn in lst:
@@ -310,7 +270,6 @@ if __name__ == '__main__':
     lst = [
         #"sv.cmp/ff=gt *0,*1,*2,0",
         "dsld 5,4,5,3",
-
     ]
     isa = SVP64Asm(lst, macros=macros)
     log("list:\n", "\n\t".join(list(isa)))
-- 
2.30.2