From 2489e4dfd183919028d5a346c2dffc6138c7269f Mon Sep 17 00:00:00 2001 From: =?utf8?q?Timur=20Krist=C3=B3f?= Date: Wed, 12 Feb 2020 14:28:29 +0100 Subject: [PATCH] aco: Implement load_invocation_id for tessellation control shaders. MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Timur Kristóf Reviewed-by: Rhys Perry Part-of: --- src/amd/compiler/aco_instruction_selection.cpp | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 0b5a62b0ea4..0be69aa47e8 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -6848,12 +6848,20 @@ void visit_intrinsic(isel_context *ctx, nir_intrinsic_instr *instr) break; } case nir_intrinsic_load_invocation_id: { - assert(ctx->shader->info.stage == MESA_SHADER_GEOMETRY); Temp dst = get_ssa_temp(ctx, &instr->dest.ssa); - if (ctx->options->chip_class >= GFX10) - bld.vop2_e64(aco_opcode::v_and_b32, Definition(dst), Operand(127u), get_arg(ctx, ctx->args->ac.gs_invocation_id)); - else - bld.copy(Definition(dst), get_arg(ctx, ctx->args->ac.gs_invocation_id)); + + if (ctx->shader->info.stage == MESA_SHADER_GEOMETRY) { + if (ctx->options->chip_class >= GFX10) + bld.vop2_e64(aco_opcode::v_and_b32, Definition(dst), Operand(127u), get_arg(ctx, ctx->args->ac.gs_invocation_id)); + else + bld.copy(Definition(dst), get_arg(ctx, ctx->args->ac.gs_invocation_id)); + } else if (ctx->shader->info.stage == MESA_SHADER_TESS_CTRL) { + bld.vop3(aco_opcode::v_bfe_u32, Definition(dst), + get_arg(ctx, ctx->args->ac.tcs_rel_ids), Operand(8u), Operand(5u)); + } else { + unreachable("Unsupported stage for load_invocation_id"); + } + break; } case nir_intrinsic_load_primitive_id: { -- 2.30.2