From 24c996e6b104ae2229ff9acf82e83860ecb26e84 Mon Sep 17 00:00:00 2001 From: Dmitry Selyutin Date: Tue, 1 Nov 2022 20:37:32 +0300 Subject: [PATCH] Revert "corrections to shadd/uw after reverting to switch" This reverts commit 6484c99953ceeff206a5888c148b9412be1b5656. --- openpower/isa/bitmanip.mdwn | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/openpower/isa/bitmanip.mdwn b/openpower/isa/bitmanip.mdwn index 94fd48ba..89515ec9 100644 --- a/openpower/isa/bitmanip.mdwn +++ b/openpower/isa/bitmanip.mdwn @@ -112,10 +112,11 @@ Pseudo-code: n <- (RB) switch (sm) - case (0): RT <- (n[1:XLEN-1] || [0]*1) + (RA) - case (1): RT <- (n[2:XLEN-1] || [0]*2) + (RA) - case (2): RT <- (n[3:XLEN-1] || [0]*3) + (RA) - case (3): RT <- (n[4:XLEN-1] || [0]*4) + (RA) + case (0): sum[0:XLEN-1] = (n[0:XLEN-1-1] || [0]*1) + (RA) + case (1): sum[0:XLEN-1] = (n[0:XLEN-2-1] || [0]*2) + (RA) + case (2): sum[0:XLEN-1] = (n[0:XLEN-3-1] || [0]*3) + (RA) + default: sum[0:XLEN-1] = (n[0:XLEN-4-1] || [0]*4) + (RA) + RT <- sum Special Registers Altered: @@ -132,10 +133,11 @@ Pseudo-code: n <- ([0]*(XLEN/2)) || (RB)[XLEN/2:XLEN-1] switch (sm) - case (0): RT <- (n[1:XLEN-1] || [0]*1) + (RA) - case (1): RT <- (n[2:XLEN-1] || [0]*2) + (RA) - case (2): RT <- (n[3:XLEN-1] || [0]*3) + (RA) - case (3): RT <- (n[4:XLEN-1] || [0]*4) + (RA) + case (0): sum[0:XLEN-1] = (n[0:XLEN-1-1] || [0]*1) + (RA) + case (1): sum[0:XLEN-1] = (n[0:XLEN-2-1] || [0]*2) + (RA) + case (2): sum[0:XLEN-1] = (n[0:XLEN-3-1] || [0]*3) + (RA) + default: sum[0:XLEN-1] = (n[0:XLEN-4-1] || [0]*4) + (RA) + RT <- sum Special Registers Altered: -- 2.30.2