From 256d4e5d06761335ee9e6122336a8e8c8026df71 Mon Sep 17 00:00:00 2001 From: Shriya Sharma Date: Mon, 25 Sep 2023 18:33:52 +0100 Subject: [PATCH] Added english language description, spaces and brackets for lhau instruction --- openpower/isa/fixedload.mdwn | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn index 036ac57c..7dd4bd0c 100644 --- a/openpower/isa/fixedload.mdwn +++ b/openpower/isa/fixedload.mdwn @@ -244,6 +244,17 @@ Pseudo-code: RT <- EXTS(MEM(EA, 2)) RA <- EA +Description: + + Let the effective address (EA) be the sum (RA)+ D. The + halfword in storage addressed by EA is loaded into + RT[48:63]. RT[0:47] are filled with a copy of bit 0 of the + loaded halfword. + + EA is placed into register RA. + + If RA=0 or RA=RT, the instruction form is invalid. + Special Registers Altered: None -- 2.30.2