From 26196c0981b5ff998548ce5faab5caf7fc6bb770 Mon Sep 17 00:00:00 2001 From: whitequark Date: Mon, 3 Jun 2019 16:47:41 +0000 Subject: [PATCH] vendor.conn.pmod: implement. Fixes #79. --- nmigen/vendor/conn/__init__.py | 0 nmigen/vendor/conn/pmod.py | 94 ++++++++++++++++++++++++++++++++++ 2 files changed, 94 insertions(+) create mode 100644 nmigen/vendor/conn/__init__.py create mode 100644 nmigen/vendor/conn/pmod.py diff --git a/nmigen/vendor/conn/__init__.py b/nmigen/vendor/conn/__init__.py new file mode 100644 index 0000000..e69de29 diff --git a/nmigen/vendor/conn/pmod.py b/nmigen/vendor/conn/pmod.py new file mode 100644 index 0000000..5566c55 --- /dev/null +++ b/nmigen/vendor/conn/pmod.py @@ -0,0 +1,94 @@ +# Reference: https://www.digilentinc.com/Pmods/Digilent-Pmod_%20Interface_Specification.pdf + +from ...build import * + + +__all__ = [ + "PmodGPIOType1Resource", + "PmodSPIType2Resource", + "PmodSPIType2AResource", + "PmodUARTType3Resource", + "PmodUARTType4Resource", + "PmodUARTType4AResource", + "PmodHBridgeType5Resource", + "PmodDualHBridgeType6Resource", +] + + +def PmodGPIOType1Resource(name, number, *, pmod, extras=None): + return Resource(name, number, + Pins("1 2 3 4", dir="io", conn=("pmod", pmod)), + extras=extras + ) + + +def PmodSPIType2Resource(name, number, *, pmod, extras=None): + return Resource(name, number, + Subsignal("cs_n", Pins("1", dir="o", conn=("pmod", pmod))), + Subsignal("clk", Pins("2", dir="o", conn=("pmod", pmod))), + Subsignal("mosi", Pins("3", dir="o", conn=("pmod", pmod))), + Subsignal("miso", Pins("4", dir="i", conn=("pmod", pmod))), + extras=extras + ) + + +def PmodSPIType2AResource(name, number, *, pmod, extras=None): + return Resource(name, number, + Subsignal("cs_n", Pins("1", dir="o", conn=("pmod", pmod))), + Subsignal("clk", Pins("2", dir="o", conn=("pmod", pmod))), + Subsignal("mosi", Pins("3", dir="o", conn=("pmod", pmod))), + Subsignal("miso", Pins("4", dir="i", conn=("pmod", pmod))), + Subsignal("int", Pins("7", dir="i", conn=("pmod", pmod))), + Subsignal("reset", Pins("8", dir="o", conn=("pmod", pmod))), + extras=extras + ) + + +def PmodUARTType3Resource(name, number, *, pmod, extras=None): + return Resource(name, number, + Subsignal("cts", Pins("1", dir="o", conn=("pmod", pmod))), + Subsignal("rts", Pins("2", dir="i", conn=("pmod", pmod))), + Subsignal("rx", Pins("3", dir="i", conn=("pmod", pmod))), + Subsignal("tx", Pins("4", dir="o", conn=("pmod", pmod))), + extras=extras + ) + + +def PmodUARTType4Resource(name, number, *, pmod, extras=None): + return Resource(name, number, + Subsignal("cts", Pins("1", dir="i", conn=("pmod", pmod))), + Subsignal("tx", Pins("2", dir="o", conn=("pmod", pmod))), + Subsignal("rx", Pins("3", dir="i", conn=("pmod", pmod))), + Subsignal("rts", Pins("4", dir="o", conn=("pmod", pmod))), + extras=extras + ) + + +def PmodUARTType4AResource(name, number, *, pmod, extras=None): + return Resource(name, number, + Subsignal("cts", Pins("1", dir="i", conn=("pmod", pmod))), + Subsignal("tx", Pins("2", dir="o", conn=("pmod", pmod))), + Subsignal("rx", Pins("3", dir="i", conn=("pmod", pmod))), + Subsignal("rts", Pins("4", dir="o", conn=("pmod", pmod))), + Subsignal("int", Pins("7", dir="i", conn=("pmod", pmod))), + Subsignal("reset", Pins("8", dir="o", conn=("pmod", pmod))), + extras=extras + ) + + +def PmodHBridgeType5Resource(name, number, *, pmod, extras=None): + return Resource(name, number, + Subsignal("dir", Pins("1", dir="o", conn=("pmod", pmod))), + Subsignal("en", Pins("2", dir="o", conn=("pmod", pmod))), + Subsignal("sa", Pins("3", dir="i", conn=("pmod", pmod))), + Subsignal("sb", Pins("4", dir="i", conn=("pmod", pmod))), + extras=extras + ) + + +def PmodDualHBridgeType6Resource(name, number, *, pmod, extras=None): + return Resource(name, number, + Subsignal("dir", Pins("1 3", dir="o", conn=("pmod", pmod))), + Subsignal("en", Pins("2 4", dir="o", conn=("pmod", pmod))), + extras=extras + ) -- 2.30.2