From 2624ba48c2ee4997e6f9fd98ffbdff93215ec77e Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Mon, 5 Nov 2018 10:47:25 +0100 Subject: [PATCH] bios/sdram: replace DDR3_MR1 constant with DDRX_MR1 --- litex/soc/software/bios/sdram.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/litex/soc/software/bios/sdram.c b/litex/soc/software/bios/sdram.c index 87aa3acb..6344006b 100644 --- a/litex/soc/software/bios/sdram.c +++ b/litex/soc/software/bios/sdram.c @@ -213,7 +213,7 @@ void sdrwr(char *startaddr) void sdrwlon(void) { - sdram_dfii_pi0_address_write(DDR3_MR1 | (1 << 7)); + sdram_dfii_pi0_address_write(DDRX_MR1 | (1 << 7)); sdram_dfii_pi0_baddress_write(1); command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS); ddrphy_wlevel_en_write(1); @@ -221,7 +221,7 @@ void sdrwlon(void) void sdrwloff(void) { - sdram_dfii_pi0_address_write(DDR3_MR1); + sdram_dfii_pi0_address_write(DDRX_MR1); sdram_dfii_pi0_baddress_write(1); command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS); ddrphy_wlevel_en_write(0); @@ -245,7 +245,11 @@ int write_level(void) int ok; +#ifdef KUSDDRPHY + err_ddrphy_wdly = ERR_DDRPHY_DELAY; /* FIXME */ +#else err_ddrphy_wdly = ERR_DDRPHY_DELAY - ddrphy_half_sys8x_taps_read() - 1; +#endif printf("Write leveling:\n"); -- 2.30.2