From 2642970ac30725c4ffbd0858ef118affaab35c62 Mon Sep 17 00:00:00 2001
From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Thu, 19 Oct 2023 11:25:04 +0100
Subject: [PATCH] added lwzsux instruction

---
 openpower/isa/fixedloadshift.mdwn | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn
index 0d43c5c1..9fdc716f 100644
--- a/openpower/isa/fixedloadshift.mdwn
+++ b/openpower/isa/fixedloadshift.mdwn
@@ -138,15 +138,15 @@ Special Registers Altered:
 
     None
 
-# Load Word and Zero with Update Indexed
+# Load Word and Zero Shifted with Update Indexed
 
 X-Form
 
-* lwzux RT,RA,RB
+* lwzsux RT,RA,RB,sm
 
 Pseudo-code:
 
-    EA <- (RA) + (RB)
+    EA <- (RA) + (RB) << (sm+1)
     RT <- [0] * 32 || MEM(EA, 4)
     RA <- EA
 
-- 
2.30.2