From 26c666565d347bd91fb86466d68ed578ac798ea6 Mon Sep 17 00:00:00 2001 From: Kugan Vivekanandarajah Date: Sat, 16 May 2015 09:35:52 +0000 Subject: [PATCH] re PR target/65768 (sub-optimimal code for constant Uses in loop) gcc/ChangeLog: 2015-05-16 Kugan Vivekanandarajah Zhenqiang Chen PR target/65768 * config/arm/arm.h (DONT_EARLY_SPLIT_CONSTANT): New macro. * config/arm/arm.md (subsi3, andsi3, iorsi3, xorsi3, movsi): Keep some large constants in register instead of splitting them. gcc/testsuite/ChangeLog: 2015-05-16 Kugan Vivekanandarajah Zhenqiang Chen PR target/65768 * gcc.target/arm/maskdata.c: New test. Co-Authored-By: Zhenqiang Chen From-SVN: r223235 --- gcc/ChangeLog | 8 +++ gcc/config/arm/arm.h | 6 ++ gcc/config/arm/arm.md | 73 ++++++++++++++++++------- gcc/testsuite/ChangeLog | 6 ++ gcc/testsuite/gcc.target/arm/maskdata.c | 15 +++++ 5 files changed, 87 insertions(+), 21 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/maskdata.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index da14ae88760..84e282a0e84 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2015-05-16 Kugan Vivekanandarajah + Zhenqiang Chen + + PR target/65768 + * config/arm/arm.h (DONT_EARLY_SPLIT_CONSTANT): New macro. + * config/arm/arm.md (subsi3, andsi3, iorsi3, xorsi3, movsi): Keep some + large constants in register instead of splitting them. + 2015-05-16 Uros Bizjak PR target/66140 diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index a58a7b14dee..6480123985c 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -396,6 +396,12 @@ extern void (*arm_lang_output_object_attributes_hook)(void); /* Should NEON be used for 64-bits bitops. */ #define TARGET_PREFER_NEON_64BITS (prefer_neon_for_64bits) +/* Should constant I be slplit for OP. */ +#define DONT_EARLY_SPLIT_CONSTANT(i, op) \ + ((optimize >= 2) \ + && can_create_pseudo_p () \ + && !const_ok_for_op (i, op)) + /* True iff the full BPABI is being used. If TARGET_BPABI is true, then TARGET_AAPCS_BASED must be true -- but the converse does not hold. TARGET_BPABI implies the use of the BPABI runtime library, diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index adbb83fd889..9a71b79fc5d 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -1168,10 +1168,16 @@ { if (TARGET_32BIT) { - arm_split_constant (MINUS, SImode, NULL_RTX, - INTVAL (operands[1]), operands[0], - operands[2], optimize && can_create_pseudo_p ()); - DONE; + if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[1]), MINUS)) + operands[1] = force_reg (SImode, operands[1]); + else + { + arm_split_constant (MINUS, SImode, NULL_RTX, + INTVAL (operands[1]), operands[0], + operands[2], + optimize && can_create_pseudo_p ()); + DONE; + } } else /* TARGET_THUMB1 */ operands[1] = force_reg (SImode, operands[1]); @@ -2082,14 +2088,19 @@ operands[1] = convert_to_mode (QImode, operands[1], 1); emit_insn (gen_thumb2_zero_extendqisi2_v6 (operands[0], operands[1])); + DONE; } + else if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[2]), AND)) + operands[2] = force_reg (SImode, operands[2]); else - arm_split_constant (AND, SImode, NULL_RTX, - INTVAL (operands[2]), operands[0], - operands[1], - optimize && can_create_pseudo_p ()); + { + arm_split_constant (AND, SImode, NULL_RTX, + INTVAL (operands[2]), operands[0], + operands[1], + optimize && can_create_pseudo_p ()); - DONE; + DONE; + } } } else /* TARGET_THUMB1 */ @@ -2888,10 +2899,16 @@ { if (TARGET_32BIT) { - arm_split_constant (IOR, SImode, NULL_RTX, - INTVAL (operands[2]), operands[0], operands[1], - optimize && can_create_pseudo_p ()); - DONE; + if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[2]), IOR)) + operands[2] = force_reg (SImode, operands[2]); + else + { + arm_split_constant (IOR, SImode, NULL_RTX, + INTVAL (operands[2]), operands[0], + operands[1], + optimize && can_create_pseudo_p ()); + DONE; + } } else /* TARGET_THUMB1 */ { @@ -3058,10 +3075,16 @@ { if (TARGET_32BIT) { - arm_split_constant (XOR, SImode, NULL_RTX, - INTVAL (operands[2]), operands[0], operands[1], - optimize && can_create_pseudo_p ()); - DONE; + if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[2]), XOR)) + operands[2] = force_reg (SImode, operands[2]); + else + { + arm_split_constant (XOR, SImode, NULL_RTX, + INTVAL (operands[2]), operands[0], + operands[1], + optimize && can_create_pseudo_p ()); + DONE; + } } else /* TARGET_THUMB1 */ { @@ -5548,10 +5571,18 @@ && !(const_ok_for_arm (INTVAL (operands[1])) || const_ok_for_arm (~INTVAL (operands[1])))) { - arm_split_constant (SET, SImode, NULL_RTX, - INTVAL (operands[1]), operands[0], NULL_RTX, - optimize && can_create_pseudo_p ()); - DONE; + if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[1]), SET)) + { + emit_insn (gen_rtx_SET (operands[0], operands[1])); + DONE; + } + else + { + arm_split_constant (SET, SImode, NULL_RTX, + INTVAL (operands[1]), operands[0], NULL_RTX, + optimize && can_create_pseudo_p ()); + DONE; + } } } else /* TARGET_THUMB1... */ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 7d58a1883a1..430e6bd7287 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2015-05-16 Kugan Vivekanandarajah + Zhenqiang Chen + + PR target/65768 + * gcc.target/arm/maskdata.c: New test. + 2015-05-16 Mikael Morin PR fortran/65792 diff --git a/gcc/testsuite/gcc.target/arm/maskdata.c b/gcc/testsuite/gcc.target/arm/maskdata.c new file mode 100644 index 00000000000..6d6bb39a265 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/maskdata.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options " -O2 -fno-gcse " } */ +/* { dg-require-effective-target arm_thumb2_ok } */ + +#define MASK 0xff00ff +void maskdata (int * data, int len) +{ + int i = len; + for (; i > 0; i -= 2) + { + data[i] &= MASK; + data[i + 1] &= MASK; + } +} +/* { dg-final { scan-assembler-not "65280" } } */ -- 2.30.2