From 27225f57ecea6a7417898119a3a02ee10a9c10bd Mon Sep 17 00:00:00 2001 From: Alexandre Oliva Date: Sun, 21 Feb 2021 22:50:12 -0300 Subject: [PATCH] make svp64 mutually exclusive with vsx and altivec --- gcc/config/rs6000/rs6000.c | 44 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 991da1f9fc0..e921215653d 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -3944,6 +3944,50 @@ rs6000_option_override_internal (bool global_init_p) } } + /* Add some warnings, errors and overriders for SVP64. */ + if (TARGET_SVP64) + { + const bool xsvp64 = rs6000_isa_flags_explicit & OPTION_MASK_SVP64; + const bool xvsx = rs6000_isa_flags_explicit & OPTION_MASK_VSX; + const bool xaltivec = rs6000_isa_flags_explicit & OPTION_MASK_ALTIVEC; + const bool vsx = TARGET_VSX; + const bool altivec = TARGET_ALTIVEC; + + if (xsvp64) + { + if (vsx) + { + if (xvsx) + error ("%<-mvsx%> and %<-msvp64%> are incompatible"); + else + warning (0, "%<-msvp64%> disables vsx"); + + rs6000_isa_flags &= ~ OPTION_MASK_VSX; + rs6000_isa_flags_explicit |= OPTION_MASK_VSX; + } + if (altivec) + { + if (xaltivec) + error ("%<-maltivec%> and %<-msvp64%> are incompatible"); + else + warning (0, "%<-msvp64%> disables altivec"); + + rs6000_isa_flags &= ~ OPTION_MASK_ALTIVEC; + rs6000_isa_flags_explicit |= OPTION_MASK_ALTIVEC; + } + } + else + { + if (vsx) + warning (0, "%<-mvsx%> disables svp64"); + if (altivec) + warning (0, "%<-maltivec%> disables svp64"); + + rs6000_isa_flags &= ~ OPTION_MASK_SVP64; + rs6000_isa_flags_explicit |= OPTION_MASK_SVP64; + } + } + /* If hard-float/altivec/vsx were explicitly turned off then don't allow the -mcpu setting to enable options that conflict. */ if ((!TARGET_HARD_FLOAT || !TARGET_ALTIVEC || !TARGET_VSX) -- 2.30.2