From 27479d16b4e2ca08dbf1e6e9f51129a4fc38e836 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Wed, 20 Jul 2022 16:33:40 +0100
Subject: [PATCH]

---
 openpower/isa.mdwn | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/openpower/isa.mdwn b/openpower/isa.mdwn
index 2e1e54466..d1067448b 100644
--- a/openpower/isa.mdwn
+++ b/openpower/isa.mdwn
@@ -35,7 +35,7 @@ Scalar instructions added as part of [[sv/svp64]] development, these are
 all **DRAFT FORM** and they are all stand-alone Scalar (no hard dependency
 on Simple-V).
 Explanation of the rules for twin register targets
-(implicit RS, FRS) explained in SVPY4 [[sv/svp64/appendix]]
+(implicit RS, FRS) explained in SVP64 [[sv/svp64/appendix]]
 
 * [[isa/svfixedload]] DEPRECATED, do not use.
 * [[isa/svfixedarith]]
-- 
2.30.2