From 27b6cac7ddefb7252ac7674b4d0c08f743092d16 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 21 Mar 2019 19:58:56 +0000 Subject: [PATCH] reduce args to FPAddStage1 --- src/add/nmigen_add_experiment.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/add/nmigen_add_experiment.py b/src/add/nmigen_add_experiment.py index 55438c2b..94060c4c 100644 --- a/src/add/nmigen_add_experiment.py +++ b/src/add/nmigen_add_experiment.py @@ -915,10 +915,10 @@ class FPAddStage1(FPState, FPID): self.out_of = Overflow() self.norm_stb = Signal() - def setup(self, m, in_tot, in_z, in_mid): + def setup(self, m, i, in_mid): """ links module to inputs and outputs """ - self.mod.setup(m, in_tot, in_z) + self.mod.setup(m, i) m.d.sync += self.norm_stb.eq(0) # sets to zero when not in add1 state -- 2.30.2