From 280c4e7794543e99244aafffc62a2dd4454bcb06 Mon Sep 17 00:00:00 2001
From: Bogdan Vukobratovic <bogdan.vukobratovic@gmail.com>
Date: Sat, 3 Aug 2019 12:28:46 +0200
Subject: [PATCH] Fix spacing in opt_share tests, change wording in opt_share
 help

---
 passes/opt/opt_share.cc                       | 16 +++++---
 tests/opt/opt_share_add_sub.v                 | 12 +++---
 tests/opt/opt_share_cat.v                     | 20 +++++-----
 tests/opt/opt_share_cat_multiuser.v           | 34 ++++++++--------
 tests/opt/opt_share_diff_port_widths.v        | 32 +++++++--------
 tests/opt/opt_share_extend.v                  | 29 +++++++-------
 tests/opt/opt_share_large_pmux_cat.v          | 35 ++++++++--------
 .../opt/opt_share_large_pmux_cat_multipart.v  | 40 +++++++++----------
 tests/opt/opt_share_large_pmux_multipart.v    | 39 +++++++++---------
 tests/opt/opt_share_large_pmux_part.v         | 35 ++++++++--------
 tests/opt/opt_share_mux_tree.v                | 29 +++++++-------
 11 files changed, 160 insertions(+), 161 deletions(-)

diff --git a/passes/opt/opt_share.cc b/passes/opt/opt_share.cc
index e9a2f05f9..25b07cbbd 100644
--- a/passes/opt/opt_share.cc
+++ b/passes/opt/opt_share.cc
@@ -2,6 +2,7 @@
  *  yosys -- Yosys Open SYnthesis Suite
  *
  *  Copyright (C) 2012  Clifford Wolf <clifford@clifford.at>
+ *                2019  Bogdan Vukobratovic <bogdan.vukobratovic@gmail.com>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above
@@ -308,17 +309,20 @@ void remove_multi_user_outbits(RTLIL::Module *module, dict<RTLIL::SigBit, RTLIL:
 	}
 }
 
-struct OptRmdffPass : public Pass {
-	OptRmdffPass() : Pass("opt_share", "merge arithmetic operators that share an operand") {}
+struct OptSharePass : public Pass {
+	OptSharePass() : Pass("opt_share", "merge arithmetic operators that share an operand") {}
 	void help() YS_OVERRIDE
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
 		log("\n");
 		log("    opt_share [selection]\n");
 		log("\n");
-		log("This pass identifies arithmetic operators that share an operand and whose\n");
-		log("results are used in mutually exclusive cases controlled by a multiplexer,\n");
-		log("and merges them together by multiplexing the other operands.\n");
+
+		log("This pass identifies mutually exclusive $alu arithmetic cells that:\n");
+		log("    (a) share an input operand\n");
+		log("    (b) drive the same $mux, $_MUX_, or $pmux multiplexing cell allowing\n");
+		log("        the $alu cell to be merged and the multiplexer to be moved from\n");
+		log("        multiplexing its output to multiplexing the non-shared input operands.\n");
 		log("\n");
 	}
 	void execute(std::vector<std::string>, RTLIL::Design *design) YS_OVERRIDE
@@ -454,6 +458,6 @@ struct OptRmdffPass : public Pass {
 		}
 	}
 
-} OptRmdffPass;
+} OptSharePass;
 
 PRIVATE_NAMESPACE_END
diff --git a/tests/opt/opt_share_add_sub.v b/tests/opt/opt_share_add_sub.v
index 30e093a39..1c2665cf0 100644
--- a/tests/opt/opt_share_add_sub.v
+++ b/tests/opt/opt_share_add_sub.v
@@ -1,10 +1,10 @@
 module opt_share_test(
-               input [15:0]  a,
-               input [15:0]  b,
-               input 				 sel,
-               output [15:0] res,
-               );
+	input [15:0] 	a,
+	input [15:0] 	b,
+	input 				sel,
+	output [15:0] res,
+	);
 
-  assign res = {sel ? a + b : a - b};
+	assign res = {sel ? a + b : a - b};
 
 endmodule
diff --git a/tests/opt/opt_share_cat.v b/tests/opt/opt_share_cat.v
index 605dcfe59..7b6f626b9 100644
--- a/tests/opt/opt_share_cat.v
+++ b/tests/opt/opt_share_cat.v
@@ -1,15 +1,15 @@
 module opt_share_test(
-               input [15:0]  a,
-               input [15:0]  b,
-               input [15:0]  c,
-               input [15:0]  d,
-               input 				 sel,
-               output [63:0] res,
-               );
+	input [15:0] 	a,
+	input [15:0] 	b,
+	input [15:0] 	c,
+	input [15:0] 	d,
+	input 				sel,
+	output [63:0] res,
+	);
 
-  reg [31: 0] 							 cat1 = {a+b, c+d};
-  reg [31: 0] 							 cat2 = {a-b, c-d};
+	reg [31: 0] 	cat1 = {a+b, c+d};
+	reg [31: 0] 	cat2 = {a-b, c-d};
 
-  assign res = {b, sel ? cat1 : cat2, a};
+	assign res = {b, sel ? cat1 : cat2, a};
 
 endmodule
diff --git a/tests/opt/opt_share_cat_multiuser.v b/tests/opt/opt_share_cat_multiuser.v
index 9ac0ceec8..f77f912e9 100644
--- a/tests/opt/opt_share_cat_multiuser.v
+++ b/tests/opt/opt_share_cat_multiuser.v
@@ -1,22 +1,22 @@
 module opt_share_test(
-               input [15:0] 		 a,
-               input [15:0] 		 b,
-               input [15:0] 		 c,
-               input [15:0] 		 d,
-               input 						 sel,
-               output reg [47:0] res,
-               );
+	input [15:0] 			a,
+	input [15:0] 			b,
+	input [15:0] 			c,
+	input [15:0] 			d,
+	input 						sel,
+	output reg [47:0] res,
+	);
 
-  wire [15:0] 									 add_res = a+b;
-  wire [15:0] 									 sub_res = a-b;
-  wire [31: 0] 									 cat1 = {add_res, c+d};
-  wire [31: 0] 									 cat2 = {sub_res, c-d};
+	wire [15:0] 			add_res = a+b;
+	wire [15:0] 			sub_res = a-b;
+	wire [31: 0] 			cat1 = {add_res, c+d};
+	wire [31: 0] 			cat2 = {sub_res, c-d};
 
-  always @* begin
-    case(sel)
-      0: res = {cat1, add_res};
-      1: res = {cat2, add_res};
-    endcase
-  end
+	always @* begin
+		case(sel)
+			0: res = {cat1, add_res};
+			1: res = {cat2, add_res};
+		endcase
+	end
 
 endmodule
diff --git a/tests/opt/opt_share_diff_port_widths.v b/tests/opt/opt_share_diff_port_widths.v
index 5e2971e30..e57ab7a83 100644
--- a/tests/opt/opt_share_diff_port_widths.v
+++ b/tests/opt/opt_share_diff_port_widths.v
@@ -1,21 +1,21 @@
 module opt_share_test(
-               input [15:0] 		 a,
-               input [15:0] 		 b,
-							 input [15:0] 		 c,
-							 input [1:0] 			 sel,
-							 output reg [15:0] res
-               );
+	input [15:0]			 a,
+	input [15:0]			 b,
+	input [15:0]			 c,
+	input [1:0]			 sel,
+	output reg [15:0] res
+	);
 
-  wire [15:0] 							 add0_res = a+b;
-  wire [15:0] 							 add1_res = a+c;
+	wire [15:0] 			add0_res = a+b;
+	wire [15:0] 			add1_res = a+c;
 
-  always @* begin
-    case(sel)
-      0: res = add0_res[10:0];
-      1: res = add1_res[10:0];
-      2: res = a - b;
-      default: res = 32'bx;
-    endcase
-  end
+	always @* begin
+		case(sel)
+			0: res = add0_res[10:0];
+			1: res = add1_res[10:0];
+			2: res = a - b;
+			default: res = 32'bx;
+		endcase
+	end
 
 endmodule
diff --git a/tests/opt/opt_share_extend.v b/tests/opt/opt_share_extend.v
index 5ed6bde6f..60ce1a2f3 100644
--- a/tests/opt/opt_share_extend.v
+++ b/tests/opt/opt_share_extend.v
@@ -1,19 +1,18 @@
 module opt_share_test(
-											input signed [7:0] 			 a,
-											input signed [10:0] 		 b,
-											input signed [15:0] 		 c,
-											input [1:0] 						 sel,
-											output reg signed [15:0] res
-											);
+	input signed [7:0]			 a,
+	input signed [10:0]			 b,
+	input signed [15:0]			 c,
+	input [1:0]							 sel,
+	output reg signed [15:0] res
+	);
 
-
-  always @* begin
-    case(sel)
-      0: res = a + b;
-      1: res = a - b;
-      2: res = a + c;
-      default: res = 16'bx;
-    endcase
-  end
+	always @* begin
+		case(sel)
+			0: res = a + b;
+			1: res = a - b;
+			2: res = a + c;
+			default: res = 16'bx;
+		endcase
+	end
 
 endmodule
diff --git a/tests/opt/opt_share_large_pmux_cat.v b/tests/opt/opt_share_large_pmux_cat.v
index 6208c796b..0667e6080 100644
--- a/tests/opt/opt_share_large_pmux_cat.v
+++ b/tests/opt/opt_share_large_pmux_cat.v
@@ -1,22 +1,21 @@
 module opt_share_test(
-											input [15:0] 			a,
-											input [15:0] 			b,
-											input [15:0] 			c,
-											input [2:0] 			sel,
-											output reg [31:0] res
-											);
+	input [15:0]			a,
+	input [15:0]			b,
+	input [15:0]			c,
+	input [2:0]				sel,
+	output reg [31:0] res
+	);
 
-
-  always @* begin
-    case(sel)
-      0: res = {a + b, a};
-      1: res = {a - b, b};
-      2: res = {a + c, c};
-      3: res = {a - c, a};
-      4: res = {b, b};
-      5: res = {c, c};
-      default: res = 32'bx;
-    endcase
-  end
+	always @* begin
+		case(sel)
+			0: res = {a + b, a};
+			1: res = {a - b, b};
+			2: res = {a + c, c};
+			3: res = {a - c, a};
+			4: res = {b, b};
+			5: res = {c, c};
+			default: res = 32'bx;
+		endcase
+	end
 
 endmodule
diff --git a/tests/opt/opt_share_large_pmux_cat_multipart.v b/tests/opt/opt_share_large_pmux_cat_multipart.v
index f97971bf6..f26505d3a 100644
--- a/tests/opt/opt_share_large_pmux_cat_multipart.v
+++ b/tests/opt/opt_share_large_pmux_cat_multipart.v
@@ -1,25 +1,25 @@
 module opt_share_test(
-											input [15:0] 			a,
-											input [15:0] 			b,
-											input [15:0] 			c,
-											input [15:0] 			d,
-											input [2:0] 			sel,
-											output reg [31:0] res
-											);
+	input [15:0]			a,
+	input [15:0]			b,
+	input [15:0]			c,
+	input [15:0]			d,
+	input [2:0]				sel,
+	output reg [31:0] res
+	);
 
-  wire [15:0] 													add0_res = a+d;
+	wire [15:0] 			add0_res = a+d;
 
-  always @* begin
-    case(sel)
-      0: res = {add0_res, a};
-      1: res = {a - b, add0_res[7], 15'b0};
-      2: res = {b-a, b};
-      3: res = {d, b - c};
-      4: res = {d, b - a};
-      5: res = {c, d};
-      6: res = {a - c, b-d};
-      default: res = 32'bx;
-    endcase
-  end
+	always @* begin
+		case(sel)
+			0: res = {add0_res, a};
+			1: res = {a - b, add0_res[7], 15'b0};
+			2: res = {b-a, b};
+			3: res = {d, b - c};
+			4: res = {d, b - a};
+			5: res = {c, d};
+			6: res = {a - c, b-d};
+			default: res = 32'bx;
+		endcase
+	end
 
 endmodule
diff --git a/tests/opt/opt_share_large_pmux_multipart.v b/tests/opt/opt_share_large_pmux_multipart.v
index e7ba318ef..1c460292f 100644
--- a/tests/opt/opt_share_large_pmux_multipart.v
+++ b/tests/opt/opt_share_large_pmux_multipart.v
@@ -1,24 +1,23 @@
 module opt_share_test(
-											input [15:0] 			a,
-											input [15:0] 			b,
-											input [15:0] 			c,
-											input [15:0] 			d,
-											input [2:0] 			sel,
-											output reg [15:0] res
-											);
+	input [15:0]			a,
+	input [15:0]			b,
+	input [15:0]			c,
+	input [15:0]			d,
+	input [2:0]				sel,
+	output reg [15:0] res
+	);
 
-
-  always @* begin
-    case(sel)
-      0: res = a + d;
-      1: res = a - b;
-      2: res = b;
-      3: res = b - c;
-      4: res = b - a;
-      5: res = c;
-      6: res = a - c;
-      default: res = 16'bx;
-    endcase
-  end
+	always @* begin
+		case(sel)
+			0: res = a + d;
+			1: res = a - b;
+			2: res = b;
+			3: res = b - c;
+			4: res = b - a;
+			5: res = c;
+			6: res = a - c;
+			default: res = 16'bx;
+		endcase
+	end
 
 endmodule
diff --git a/tests/opt/opt_share_large_pmux_part.v b/tests/opt/opt_share_large_pmux_part.v
index 138be0cd6..f9dd17446 100644
--- a/tests/opt/opt_share_large_pmux_part.v
+++ b/tests/opt/opt_share_large_pmux_part.v
@@ -1,22 +1,21 @@
 module opt_share_test(
-											input [15:0] 			a,
-											input [15:0] 			b,
-											input [15:0] 			c,
-											input [2:0] 			sel,
-											output reg [15:0] res
-											);
+	input [15:0]			a,
+	input [15:0]			b,
+	input [15:0]			c,
+	input [2:0]				sel,
+	output reg [15:0] res
+	);
 
-
-  always @* begin
-    case(sel)
-      0: res = a + b;
-      1: res = a - b;
-      2: res = a + c;
-      3: res = a - c;
-      4: res = b;
-      5: res = c;
-      default: res = 16'bx;
-    endcase
-  end
+	always @* begin
+		case(sel)
+			0: res = a + b;
+			1: res = a - b;
+			2: res = a + c;
+			3: res = a - c;
+			4: res = b;
+			5: res = c;
+			default: res = 16'bx;
+		endcase
+	end
 
 endmodule
diff --git a/tests/opt/opt_share_mux_tree.v b/tests/opt/opt_share_mux_tree.v
index c90826204..4a26afb46 100644
--- a/tests/opt/opt_share_mux_tree.v
+++ b/tests/opt/opt_share_mux_tree.v
@@ -1,19 +1,18 @@
 module opt_share_test(
-               input [15:0] 		 a,
-               input [15:0] 		 b,
-               input [15:0] 		 c,
-               input [1:0] 			 sel,
-               output reg [15:0] res
-               );
+	input [15:0] 			a,
+	input [15:0] 			b,
+	input [15:0] 			c,
+	input [1:0] 			sel,
+	output reg [15:0] res
+	);
 
-
-  always @* begin
-    case(sel)
-      0: res = a + b;
-      1: res = a - b;
-      2: res = a + c;
-      default: res = 16'bx;
-    endcase
-  end
+	always @* begin
+		case(sel)
+			0: res = a + b;
+			1: res = a - b;
+			2: res = a + c;
+			default: res = 16'bx;
+		endcase
+	end
 
 endmodule
-- 
2.30.2