From 2887501ca4909a72e9d302fc25e6ac92cdff24f7 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 9 Oct 2022 20:02:25 +0100 Subject: [PATCH] --- openpower/sv/rfc/ls002/discussion.mdwn | 3 +++ 1 file changed, 3 insertions(+) diff --git a/openpower/sv/rfc/ls002/discussion.mdwn b/openpower/sv/rfc/ls002/discussion.mdwn index 01b00a3de..64a9f3cbe 100644 --- a/openpower/sv/rfc/ls002/discussion.mdwn +++ b/openpower/sv/rfc/ls002/discussion.mdwn @@ -20,6 +20,7 @@ architecture spec. In particular, the architecture spec tends to use "Move" for instructions that transfer data between registers. Here are two approaches. + a. Model the instructions on li (Load Immediate), an extended mnemonic for addi. fmvis --> Floating Load Immediate Single (flis) @@ -27,12 +28,14 @@ Under this approach the new instructions would belong in their own 3-level section, after Section 4.6.4 (Floating-Point Load and Store Double Pair Instructions). + b. Model the instructions on lxvkq (and the existing FP Load instructions) fmvis --> Load Floating-Point Single Immediate (lfsi) fishmv --> Load Floating-Point Single Immediate Lower (lfsil) Under this approach the new instructions would belong in Section 4.6.2 (Floating-Point Load Instructions), with the Load Floating-Point Single instructions. + I prefer (a), because I think it's confusing to treat these instructions, which don't access storage, like instructions that do access storage. -- 2.30.2