From 28a14787c07b0046d2789bb6bd483f8ff2e4317c Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Fri, 5 Jun 2020 18:25:50 -0700 Subject: [PATCH] freedreno/ir3: don't rely on intr->num_components It is better to use `nir_intrinsic_dest_components()` which also handles the case of intrinsics with a fixed number of dest components. Somehow this starts showing up with a nir_serialize round-trip with shader-cache. But we really shouldn't have been relying on `intr->num_components` directly. Signed-off-by: Rob Clark Part-of: --- src/freedreno/ir3/ir3_compiler_nir.c | 34 +++++++++---------- ...ir3_nir_lower_load_barycentric_at_offset.c | 1 - ...ir3_nir_lower_load_barycentric_at_sample.c | 2 -- src/freedreno/ir3/ir3_nir_lower_tess.c | 5 +-- 4 files changed, 20 insertions(+), 22 deletions(-) diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index 19633077118..27018683aff 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -1426,11 +1426,11 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr) struct ir3_instruction **dst; struct ir3_instruction * const *src; struct ir3_block *b = ctx->block; + unsigned dest_components = nir_intrinsic_dest_components(intr); int idx, comp; if (info->has_dest) { - unsigned n = nir_intrinsic_dest_components(intr); - dst = ir3_get_dst(ctx, &intr->dest, n); + dst = ir3_get_dst(ctx, &intr->dest, dest_components); } else { dst = NULL; } @@ -1443,13 +1443,13 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr) idx = nir_intrinsic_base(intr); if (nir_src_is_const(intr->src[0])) { idx += nir_src_as_uint(intr->src[0]); - for (int i = 0; i < intr->num_components; i++) { + for (int i = 0; i < dest_components; i++) { dst[i] = create_uniform_typed(b, idx + i, nir_dest_bit_size(intr->dest) == 16 ? TYPE_F16 : TYPE_F32); } } else { src = ir3_get_src(ctx, &intr->src[0]); - for (int i = 0; i < intr->num_components; i++) { + for (int i = 0; i < dest_components; i++) { dst[i] = create_uniform_indirect(b, idx + i, ir3_get_addr0(ctx, src[0], 1)); } @@ -1522,6 +1522,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr) case nir_intrinsic_store_global_ir3: { struct ir3_instruction *value, *addr, *offset; + unsigned ncomp = nir_intrinsic_src_components(intr, 0); addr = ir3_create_collect(ctx, (struct ir3_instruction*[]){ ir3_get_src(ctx, &intr->src[1])[0], @@ -1530,12 +1531,11 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr) offset = ir3_get_src(ctx, &intr->src[2])[0]; - value = ir3_create_collect(ctx, ir3_get_src(ctx, &intr->src[0]), - intr->num_components); + value = ir3_create_collect(ctx, ir3_get_src(ctx, &intr->src[0]), ncomp); struct ir3_instruction *stg = ir3_STG_G(ctx->block, addr, 0, value, 0, - create_immed(ctx->block, intr->num_components), 0, offset, 0); + create_immed(ctx->block, ncomp), 0, offset, 0); stg->cat6.type = TYPE_U32; stg->cat6.iim_val = 1; @@ -1557,15 +1557,15 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr) offset = ir3_get_src(ctx, &intr->src[1])[0]; struct ir3_instruction *load = - ir3_LDG(b, addr, 0, create_immed(ctx->block, intr->num_components), + ir3_LDG(b, addr, 0, create_immed(ctx->block, dest_components), 0, offset, 0); load->cat6.type = TYPE_U32; - load->regs[0]->wrmask = MASK(intr->num_components); + load->regs[0]->wrmask = MASK(dest_components); load->barrier_class = IR3_BARRIER_BUFFER_R; load->barrier_conflict = IR3_BARRIER_BUFFER_W; - ir3_split_dest(b, dst, load, 0, intr->num_components); + ir3_split_dest(b, dst, load, 0, dest_components); break; } @@ -1618,7 +1618,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr) if (nir_src_is_const(intr->src[1])) { struct ir3_instruction *coord = ir3_create_collect(ctx, src, 2); idx += nir_src_as_uint(intr->src[1]); - for (int i = 0; i < intr->num_components; i++) { + for (int i = 0; i < dest_components; i++) { unsigned inloc = idx * 4 + i + comp; if (ctx->so->inputs[idx].bary && !ctx->so->inputs[idx].use_ldlv) { @@ -1641,7 +1641,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr) comp = nir_intrinsic_component(intr); if (nir_src_is_const(intr->src[0])) { idx += nir_src_as_uint(intr->src[0]); - for (int i = 0; i < intr->num_components; i++) { + for (int i = 0; i < dest_components; i++) { unsigned n = idx * 4 + i + comp; dst[i] = ctx->inputs[n]; compile_assert(ctx, ctx->inputs[n]); @@ -1651,7 +1651,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr) struct ir3_instruction *collect = ir3_create_collect(ctx, ctx->ir->inputs, ctx->ninputs); struct ir3_instruction *addr = ir3_get_addr0(ctx, src[0], 4); - for (int i = 0; i < intr->num_components; i++) { + for (int i = 0; i < dest_components; i++) { unsigned n = idx * 4 + i + comp; dst[i] = create_indirect_load(ctx, ctx->ninputs, n, addr, collect); @@ -1771,7 +1771,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr) idx += nir_src_as_uint(intr->src[1]); src = ir3_get_src(ctx, &intr->src[0]); - for (int i = 0; i < intr->num_components; i++) { + for (int i = 0; i < nir_intrinsic_src_components(intr, 0); i++) { unsigned n = idx * 4 + i + comp; ctx->outputs[n] = src[i]; } @@ -1822,7 +1822,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr) break; case nir_intrinsic_load_user_clip_plane: idx = nir_intrinsic_ucp_id(intr); - for (int i = 0; i < intr->num_components; i++) { + for (int i = 0; i < dest_components; i++) { unsigned n = idx * 4 + i; dst[i] = create_driver_param(ctx, IR3_DP_UCP0_X + n); } @@ -1857,12 +1857,12 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr) ir3_split_dest(b, dst, ctx->work_group_id, 0, 3); break; case nir_intrinsic_load_num_work_groups: - for (int i = 0; i < intr->num_components; i++) { + for (int i = 0; i < dest_components; i++) { dst[i] = create_driver_param(ctx, IR3_DP_NUM_WORK_GROUPS_X + i); } break; case nir_intrinsic_load_local_group_size: - for (int i = 0; i < intr->num_components; i++) { + for (int i = 0; i < dest_components; i++) { dst[i] = create_driver_param(ctx, IR3_DP_LOCAL_GROUP_SIZE_X + i); } break; diff --git a/src/freedreno/ir3/ir3_nir_lower_load_barycentric_at_offset.c b/src/freedreno/ir3/ir3_nir_lower_load_barycentric_at_offset.c index fe5f42dc97b..5dcedfa436a 100644 --- a/src/freedreno/ir3/ir3_nir_lower_load_barycentric_at_offset.c +++ b/src/freedreno/ir3/ir3_nir_lower_load_barycentric_at_offset.c @@ -33,7 +33,6 @@ static nir_ssa_def * load(nir_builder *b, unsigned ncomp, nir_intrinsic_op op) { nir_intrinsic_instr *load_size = nir_intrinsic_instr_create(b->shader, op); - load_size->num_components = ncomp; nir_ssa_dest_init(&load_size->instr, &load_size->dest, ncomp, 32, NULL); nir_builder_instr_insert(b, &load_size->instr); diff --git a/src/freedreno/ir3/ir3_nir_lower_load_barycentric_at_sample.c b/src/freedreno/ir3/ir3_nir_lower_load_barycentric_at_sample.c index ef8d7eed025..d9fef618fd4 100644 --- a/src/freedreno/ir3/ir3_nir_lower_load_barycentric_at_sample.c +++ b/src/freedreno/ir3/ir3_nir_lower_load_barycentric_at_sample.c @@ -38,7 +38,6 @@ load_sample_pos(nir_builder *b, nir_ssa_def *samp_id) nir_intrinsic_instr *load_sp = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_sample_pos_from_id); - load_sp->num_components = 2; load_sp->src[0] = nir_src_for_ssa(samp_id); nir_ssa_dest_init(&load_sp->instr, &load_sp->dest, 2, 32, NULL); nir_builder_instr_insert(b, &load_sp->instr); @@ -54,7 +53,6 @@ lower_load_barycentric_at_sample(nir_builder *b, nir_intrinsic_instr *intr) nir_intrinsic_instr *load_bary_at_offset = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_barycentric_at_offset); - load_bary_at_offset->num_components = 2; load_bary_at_offset->src[0] = nir_src_for_ssa(pos); nir_ssa_dest_init(&load_bary_at_offset->instr, &load_bary_at_offset->dest, 2, 32, NULL); diff --git a/src/freedreno/ir3/ir3_nir_lower_tess.c b/src/freedreno/ir3/ir3_nir_lower_tess.c index 9f4985bc34f..d5d80f78098 100644 --- a/src/freedreno/ir3/ir3_nir_lower_tess.c +++ b/src/freedreno/ir3/ir3_nir_lower_tess.c @@ -707,6 +707,7 @@ lower_tess_eval_block(nir_block *block, nir_builder *b, struct state *state) case nir_intrinsic_load_tess_level_inner: case nir_intrinsic_load_tess_level_outer: { + unsigned dest_comp = nir_intrinsic_dest_components(intr); b->cursor = nir_before_instr(&intr->instr); gl_varying_slot slot; @@ -725,7 +726,7 @@ lower_tess_eval_block(nir_block *block, nir_builder *b, struct state *state) * component individually. */ nir_ssa_def *levels[4]; - for (unsigned i = 0; i < intr->num_components; i++) { + for (unsigned i = 0; i < dest_comp; i++) { nir_intrinsic_instr *new_intr = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_global_ir3); @@ -737,7 +738,7 @@ lower_tess_eval_block(nir_block *block, nir_builder *b, struct state *state) levels[i] = &new_intr->dest.ssa; } - nir_ssa_def *v = nir_vec(b, levels, intr->num_components); + nir_ssa_def *v = nir_vec(b, levels, dest_comp); nir_ssa_def_rewrite_uses(&intr->dest.ssa, nir_src_for_ssa(v)); -- 2.30.2