From 28b733ea04f4f5d85cab621e901aa8ba7b6b1ae4 Mon Sep 17 00:00:00 2001 From: Andrew Stubbs Date: Thu, 19 Mar 2020 17:44:59 +0000 Subject: [PATCH] amdgcn: Fix wrong-code bug in 64-bit masked add 2020-04-24 Andrew Stubbs gcc/ * config/gcn/gcn-valu.md (add_zext_dup2_exec): Fix merge of high-part. (add_sext_dup2_exec): Likewise. --- gcc/ChangeLog | 6 ++++++ gcc/config/gcn/gcn-valu.md | 6 ++++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4b6456e2416..30e9675693f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2020-04-24 Andrew Stubbs + + * config/gcn/gcn-valu.md (add_zext_dup2_exec): Fix merge + of high-part. + (add_sext_dup2_exec): Likewise. + 2020-04-24 Segher Boessenkool PR target/94710 diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md index 0422e153cf3..d3badb4059c 100644 --- a/gcc/config/gcn/gcn-valu.md +++ b/gcc/config/gcn/gcn-valu.md @@ -1497,7 +1497,8 @@ rtx dsthi = gcn_operand_part (mode, operands[0], 1); emit_insn (gen_vec_duplicate_exec (dsthi, gcn_operand_part (DImode, operands[2], 1), - gcn_gen_undef (mode), operands[4])); + gcn_operand_part (mode, operands[3], 1), + operands[4])); emit_insn (gen_addc3_exec (dsthi, dsthi, const0_rtx, vcc, vcc, gcn_operand_part (mode, operands[3], 1), @@ -1564,7 +1565,8 @@ rtx dsthi = gcn_operand_part (mode, operands[0], 1); emit_insn (gen_vec_duplicate_exec (dsthi, gcn_operand_part (DImode, operands[2], 1), - gcn_gen_undef (mode), operands[4])); + gcn_operand_part (mode, operands[3], 1), + operands[4])); emit_insn (gen_addc3_exec (dsthi, dsthi, operands[5], vcc, vcc, gcn_operand_part (mode, operands[3], 1), -- 2.30.2