From 28cd2da24e58b245e92c6fd3728d2d40e9c20e21 Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Fri, 31 Aug 2018 08:44:22 +0200
Subject: [PATCH] README: update

---
 README | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/README b/README
index cb8559a7..31e38820 100644
--- a/README
+++ b/README
@@ -9,10 +9,8 @@
 
 [> Intro
 --------
-LiteX is an alternative to MiSoC maintained and used by Enjoy-Digital to build
-our cores, integrate them in complete SoC and load/flash them to the hardware
-and experiment new features. (structure is kept close to MiSoC to ease
-collaboration)
+LiteX is a FPGA design/SoC builder that can be used to build cores, create
+SoCs and full FPGA designs.
 
 Typical LiteX design flow:
 --------------------------
-- 
2.30.2