From 292b9194b216c768f455ef3034dd6ed44c62e5ca Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 31 Oct 2018 03:33:28 +0000 Subject: [PATCH] add subdivisions --- riscv/sv_insn_redirect.cc | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc index a7ef40f..06a154f 100644 --- a/riscv/sv_insn_redirect.cc +++ b/riscv/sv_insn_redirect.cc @@ -429,6 +429,8 @@ bool sv_proc_t::rv_ne(sv_reg_t const & lhs, sv_reg_t const & rhs) return (lhs != rhs); } +// ---- + sv_sreg_t sv_proc_t::sv_reg_to_sreg(sv_reg_t const& v) { uint64_t x = v; @@ -447,6 +449,8 @@ sv_reg_t sv_proc_t::sv_reg_uint32(sv_reg_t const& v) return sv_reg_t((uint64_t)x); } +// ---- + sv_float32_t (sv_proc_t::f32)(sv_freg_t x) { switch (x.get_elwidth()) @@ -495,6 +499,13 @@ sv_float64_t (sv_proc_t::f64)(sv_reg_t const& v) return ::f64(x); } +sv_float128_t sv_proc_t::f128( float128_t a) +{ + return ::f128(a); +} + +// ---- + sv_reg_t (sv_proc_t::f32_classify)(sv_float32_t a) { return sv_reg_t(::f32_classify(a)); @@ -884,11 +895,6 @@ sv_float128_t sv_proc_t::f32_to_f128( sv_float32_t a) return ::f32_to_f128(a); } -sv_float128_t sv_proc_t::f128( float128_t a) -{ - return ::f128(a); -} - sv_float128_t sv_proc_t::f64_to_f128( sv_float64_t a) { return ::f64_to_f128(a); -- 2.30.2