From 2951a766bd9c2bc6ae01ab79f111c636d5ff3f6b Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Fri, 23 Nov 2018 09:47:21 +0100 Subject: [PATCH] radv: remove useless sync before CmdClear{Color,DepthStencil}Image() We don't need to flush anything before these two commands as well. This is because they have to be externally synchronized, so the app should have called CmdPipelineBarrier() prior to that and the driver should have flushed the caches. Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_meta_clear.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index bf88d3a84d9..f2f5cb32eb9 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++ b/src/amd/vulkan/radv_meta_clear.c @@ -948,9 +948,7 @@ emit_fast_htile_clear(struct radv_cmd_buffer *cmd_buffer, cmd_buffer->state.flush_bits |= (RADV_CMD_FLAG_FLUSH_AND_INV_DB | RADV_CMD_FLAG_FLUSH_AND_INV_DB_META) & ~ *pre_flush; *pre_flush |= cmd_buffer->state.flush_bits; - } else - cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB | - RADV_CMD_FLAG_FLUSH_AND_INV_DB_META; + } if (htile_mask == UINT_MAX) { /* Clear the whole HTILE buffer. */ @@ -1402,9 +1400,7 @@ emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer, cmd_buffer->state.flush_bits |= (RADV_CMD_FLAG_FLUSH_AND_INV_CB | RADV_CMD_FLAG_FLUSH_AND_INV_CB_META) & ~ *pre_flush; *pre_flush |= cmd_buffer->state.flush_bits; - } else - cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | - RADV_CMD_FLAG_FLUSH_AND_INV_CB_META; + } cmask_clear_value = radv_get_cmask_fast_clear_value(iview->image); -- 2.30.2