From 2974df819e40563916242eae7acddc0200fd69a0 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 9 Jul 2019 08:27:29 +0200 Subject: [PATCH] radv: set max workgroup size to 128 for TES as NGG on GFX10 Signed-off-by: Samuel Pitoiset Reviewed-by: Dave Airlie --- src/amd/vulkan/radv_nir_to_llvm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 9644185f870..67630c4ee92 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -3721,7 +3721,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm, } if (ctx.ac.chip_class >= GFX10) { - if (shaders[0]->info.stage == MESA_SHADER_VERTEX && + if (is_pre_gs_stage(shaders[0]->info.stage) && options->key.vs.out.as_ngg) { ctx.max_workgroup_size = 128; } -- 2.30.2