From 299b8fb27945a336ab2fcbbe3c57f4434d1b9917 Mon Sep 17 00:00:00 2001 From: "colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0" Date: Sat, 10 Apr 2021 04:04:16 +0100 Subject: [PATCH] --- HDL_workflow/ECP5_FPGA.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/HDL_workflow/ECP5_FPGA.mdwn b/HDL_workflow/ECP5_FPGA.mdwn index f99a349a5..e268ae915 100644 --- a/HDL_workflow/ECP5_FPGA.mdwn +++ b/HDL_workflow/ECP5_FPGA.mdwn @@ -16,7 +16,7 @@ Checklist based on above * ***DO*** make sure to ***only*** drive an input as an input, and to ***only*** drive an output as an output. -* ***DO*** make sure to ***only*** wire up 3.3V to 3.3V and to ***only*** wire up GND to GND with the jumper-cables. +* ***DO*** make sure to ***only*** wire up GND to GND with the jumper-cables. * ***DO*** make sure that ***before*** even ***thinking*** of uploading to and powering up the FPGA that everything has been ***THOROUGHLY*** triple-checked. -- 2.30.2