From 29aafbc413cdc48e39bebf0f7a5b34e83ad67132 Mon Sep 17 00:00:00 2001 From: Michael Meissner Date: Wed, 10 Sep 2014 21:13:37 +0000 Subject: [PATCH] vsx.md (vsx_fmav4sf4): Use correct constraints for V2DF, V4SF, DF, and DI modes. 2014-09-10 Michael Meissner * config/rs6000/vsx.md (vsx_fmav4sf4): Use correct constraints for V2DF, V4SF, DF, and DI modes. (vsx_fmav2df2): Likewise. (vsx_float_fix_2): Likewise. (vsx_reduc__v2df_scalar): Likewise. From-SVN: r215138 --- gcc/ChangeLog | 8 ++++++++ gcc/config/rs6000/vsx.md | 22 +++++++++++----------- 2 files changed, 19 insertions(+), 11 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6e532f8c057..a44c60d00d1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2014-09-10 Michael Meissner + + * config/rs6000/vsx.md (vsx_fmav4sf4): Use correct constraints for + V2DF, V4SF, DF, and DI modes. + (vsx_fmav2df2): Likewise. + (vsx_float_fix_2): Likewise. + (vsx_reduc__v2df_scalar): Likewise. + 2014-09-10 Xinliang David Li PR target/63209 diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index dc78a61a824..7aa0f12d8e0 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -996,11 +996,11 @@ ;; multiply. (define_insn "*vsx_fmav4sf4" - [(set (match_operand:V4SF 0 "vsx_register_operand" "=ws,ws,?wa,?wa,v") + [(set (match_operand:V4SF 0 "vsx_register_operand" "=wf,wf,?wa,?wa,v") (fma:V4SF - (match_operand:V4SF 1 "vsx_register_operand" "%ws,ws,wa,wa,v") - (match_operand:V4SF 2 "vsx_register_operand" "ws,0,wa,0,v") - (match_operand:V4SF 3 "vsx_register_operand" "0,ws,0,wa,v")))] + (match_operand:V4SF 1 "vsx_register_operand" "%wf,wf,wa,wa,v") + (match_operand:V4SF 2 "vsx_register_operand" "wf,0,wa,0,v") + (match_operand:V4SF 3 "vsx_register_operand" "0,wf,0,wa,v")))] "VECTOR_UNIT_VSX_P (V4SFmode)" "@ xvmaddasp %x0,%x1,%x2 @@ -1011,11 +1011,11 @@ [(set_attr "type" "vecfloat")]) (define_insn "*vsx_fmav2df4" - [(set (match_operand:V2DF 0 "vsx_register_operand" "=ws,ws,?wa,?wa") + [(set (match_operand:V2DF 0 "vsx_register_operand" "=wd,wd,?wa,?wa") (fma:V2DF - (match_operand:V2DF 1 "vsx_register_operand" "%ws,ws,wa,wa") - (match_operand:V2DF 2 "vsx_register_operand" "ws,0,wa,0") - (match_operand:V2DF 3 "vsx_register_operand" "0,ws,0,wa")))] + (match_operand:V2DF 1 "vsx_register_operand" "%wd,wd,wa,wa") + (match_operand:V2DF 2 "vsx_register_operand" "wd,0,wa,0") + (match_operand:V2DF 3 "vsx_register_operand" "0,wd,0,wa")))] "VECTOR_UNIT_VSX_P (V2DFmode)" "@ xvmaddadp %x0,%x1,%x2 @@ -1547,8 +1547,8 @@ (define_insn "vsx_concat_" [(set (match_operand:VSX_D 0 "vsx_register_operand" "=,?") (vec_concat:VSX_D - (match_operand: 1 "vsx_register_operand" "ws,") - (match_operand: 2 "vsx_register_operand" "ws,")))] + (match_operand: 1 "vsx_register_operand" ",") + (match_operand: 2 "vsx_register_operand" ",")))] "VECTOR_MEM_VSX_P (mode)" { if (BYTES_BIG_ENDIAN) @@ -2221,7 +2221,7 @@ ;; to the top element of the V2DF array without doing an extract. (define_insn_and_split "*vsx_reduc__v2df_scalar" - [(set (match_operand:DF 0 "vfloat_operand" "=&ws,&?wa,ws,?wa") + [(set (match_operand:DF 0 "vfloat_operand" "=&ws,&?ws,ws,?ws") (vec_select:DF (VEC_reduc:V2DF (vec_concat:V2DF -- 2.30.2