From 29ba79b2c929ea23b45fa065fe7c9f8fd400210c Mon Sep 17 00:00:00 2001 From: Adhemerval Zanella Date: Thu, 22 Nov 2012 11:55:35 -0600 Subject: [PATCH] gallivm: clear Altivec NJ bit This patch enforces the clear of NJ bit in VSCR Altivec register so denormal numbers are handles as expected by IEEE standards. Reviewed-by: Roland Scheidegger Reviewed-by: Jose Fonseca --- src/gallium/auxiliary/gallivm/lp_bld_init.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/src/gallium/auxiliary/gallivm/lp_bld_init.c b/src/gallium/auxiliary/gallivm/lp_bld_init.c index 0065bb49a4b..050eba7b2b3 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_init.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_init.c @@ -468,6 +468,25 @@ lp_build_init(void) util_cpu_caps.has_avx = 0; } +#ifdef PIPE_ARCH_PPC_64 + /* Set the NJ bit in VSCR to 0 so denormalized values are handled as + * specified by IEEE standard (PowerISA 2.06 - Section 6.3). This garantees + * that some rounding and half-float to float handling does not round + * incorrectly to 0. + */ + if (util_cpu_caps.has_altivec) { + unsigned short mask[] = { 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, + 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFF }; + __asm ( + "mfvscr %%v1\n" + "vand %0,%%v1,%0\n" + "mtvscr %0" + : + : "r" (*mask) + ); + } +#endif + gallivm_initialized = TRUE; #if 0 -- 2.30.2