From 2a2d77a7cc06c8f44c8b81aff683d0e9c42807e4 Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 11 Oct 2021 19:19:06 +0100 Subject: [PATCH] --- 3d_gpu/architecture/dynamic_simd/shape.mdwn | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/3d_gpu/architecture/dynamic_simd/shape.mdwn b/3d_gpu/architecture/dynamic_simd/shape.mdwn index d9c83df73..94b4cbc7e 100644 --- a/3d_gpu/architecture/dynamic_simd/shape.mdwn +++ b/3d_gpu/architecture/dynamic_simd/shape.mdwn @@ -5,6 +5,8 @@ Links: * [layout experiment](https://git.libre-soc.org/?p=ieee754fpu.git;a=blob;f=src/ieee754/part/layout_experiment.py;h=2a31a57dbcb4cb075ec14b4799e521fca6aa509b;hb=0407d90ccaf7e0e42f40918c3fa5dc1d89cf0155) * +# Requirements Analysis + A logical extension of the nmigen `ast.Shape` concept, `SimdShape` provides sufficient context to both define overrides for individual lengths on a per-mask basis as well as sufficient information to "upcast" @@ -199,5 +201,19 @@ Thus not one method of setting widths is required but *two*: * at the element level * at the width of the entire SIMD signal +With this background and context in mind the requirements can be determined + # Requirements +SimdShape needs: + +* to derive from nmigen ast.Shape in order to provide the overall + width and whether it is signed or unsigned. However the + overall width is not necessarily hard-set but may be calculated +* to support a range of sub-signal divisions (element widths) + and for there to be an option to either set each element width + explicitly or to allow each width to be computed from the + overall width and the number of partitions. +* to provide rudimentary arithmetic operator capability + that automatically computes a new SimdShape, adjusting width + and element widths accordingly. -- 2.30.2