From 2a2e69f975bd791d64a88553d5b1d5eda7e8abdf Mon Sep 17 00:00:00 2001 From: =?utf8?q?Tapani=20P=C3=A4lli?= Date: Mon, 11 Feb 2019 10:12:45 +0200 Subject: [PATCH] i965: add P0x formats and propagate required scaling factors MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Tapani Pälli Signed-off-by: Lin Johnson Reviewed-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_wm.c | 4 ++++ src/mesa/drivers/dri/i965/intel_image.h | 1 + src/mesa/drivers/dri/i965/intel_screen.c | 12 ++++++++++++ 3 files changed, 17 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 9092c560451..9f88d625d63 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -407,6 +407,10 @@ brw_populate_sampler_prog_key_data(struct gl_context *ctx, } if (t->Target == GL_TEXTURE_EXTERNAL_OES && intel_tex->planar_format) { + + /* Setup possible scaling factor. */ + key->scale_factors[s] = intel_tex->planar_format->scaling_factor; + switch (intel_tex->planar_format->components) { case __DRI_IMAGE_COMPONENTS_Y_UV: key->y_uv_image_mask |= 1 << s; diff --git a/src/mesa/drivers/dri/i965/intel_image.h b/src/mesa/drivers/dri/i965/intel_image.h index ca604159dc2..4ab8a49b8bb 100644 --- a/src/mesa/drivers/dri/i965/intel_image.h +++ b/src/mesa/drivers/dri/i965/intel_image.h @@ -62,6 +62,7 @@ struct intel_image_format { uint32_t dri_format; int cpp; } planes[3]; + float scaling_factor; }; struct __DRIimageRec { diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 0821d30f3d8..ece4ce0e334 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -282,6 +282,18 @@ static const struct intel_image_format intel_image_formats[] = { { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88, 2 } } }, + { __DRI_IMAGE_FOURCC_P010, __DRI_IMAGE_COMPONENTS_Y_UV, 2, + { { 0, 0, 0, __DRI_IMAGE_FORMAT_R16, 2 }, + { 1, 1, 1, __DRI_IMAGE_FORMAT_GR1616, 4 } } , 65535.0f/1023.0f }, + + { __DRI_IMAGE_FOURCC_P012, __DRI_IMAGE_COMPONENTS_Y_UV, 2, + { { 0, 0, 0, __DRI_IMAGE_FORMAT_R16, 2 }, + { 1, 1, 1, __DRI_IMAGE_FORMAT_GR1616, 4 } } , 65535.0f/4095.0f }, + + { __DRI_IMAGE_FOURCC_P016, __DRI_IMAGE_COMPONENTS_Y_UV, 2, + { { 0, 0, 0, __DRI_IMAGE_FORMAT_R16, 2 }, + { 1, 1, 1, __DRI_IMAGE_FORMAT_GR1616, 4 } } }, + { __DRI_IMAGE_FOURCC_NV16, __DRI_IMAGE_COMPONENTS_Y_UV, 2, { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } }, -- 2.30.2