From 2a37d9d0e6ed465d9942af42538e44f124d54bb9 Mon Sep 17 00:00:00 2001 From: Kyrylo Tkachov Date: Fri, 16 Jan 2015 16:58:58 +0000 Subject: [PATCH] [ARM] Move comment about splitting Thumb1 patterns to thumb1.md * config/arm/arm.md: Move comment about splitting Thumb1 patterns to... * config/arm/thumb1.md: ... Here. From-SVN: r219755 --- gcc/ChangeLog | 5 +++++ gcc/config/arm/arm.md | 19 ------------------- gcc/config/arm/thumb1.md | 21 +++++++++++++++++++++ 3 files changed, 26 insertions(+), 19 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b4a620bfae4..717bdbd8d44 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2015-01-16 Kyrylo Tkachov + + * config/arm/arm.md: Move comment about splitting Thumb1 patterns to... + * config/arm/thumb1.md: ... Here. + 2015-01-16 Segher Boessenkool * config/rs6000/rs6000.c (rs6000_scalar_mode_supported_p): Disallow diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 5e6649a5dd3..c88e3f1afd0 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -22,25 +22,6 @@ ;;- See file "rtl.def" for documentation on define_insn, match_*, et. al. -;; Beware of splitting Thumb1 patterns that output multiple -;; assembly instructions, in particular instruction such as SBC and -;; ADC which consume flags. For example, in the pattern thumb_subdi3 -;; below, the output SUB implicitly sets the flags (assembled to SUBS) -;; and then the Carry flag is used by SBC to compute the correct -;; result. If we split thumb_subdi3 pattern into two separate RTL -;; insns (using define_insn_and_split), the scheduler might place -;; other RTL insns between SUB and SBC, possibly modifying the Carry -;; flag used by SBC. This might happen because most Thumb1 patterns -;; for flag-setting instructions do not have explicit RTL for setting -;; or clobbering the flags. Instead, they have the attribute "conds" -;; with value "set" or "clob". However, this attribute is not used to -;; identify dependencies and therefore the scheduler might reorder -;; these instruction. Currenly, this problem cannot happen because -;; there are no separate Thumb1 patterns for individual instruction -;; that consume flags (except conditional execution, which is treated -;; differently). In particular there is no Thumb1 armv6-m pattern for -;; sbc or adc. - ;;--------------------------------------------------------------------------- ;; Constants diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md index ff423d8ed80..b1a589774ea 100644 --- a/gcc/config/arm/thumb1.md +++ b/gcc/config/arm/thumb1.md @@ -22,6 +22,27 @@ ;; Insn patterns ;; +;; Beware of splitting Thumb1 patterns that output multiple +;; assembly instructions, in particular instruction such as SBC and +;; ADC which consume flags. For example, in the pattern thumb_subdi3 +;; below, the output SUB implicitly sets the flags (assembled to SUBS) +;; and then the Carry flag is used by SBC to compute the correct +;; result. If we split thumb_subdi3 pattern into two separate RTL +;; insns (using define_insn_and_split), the scheduler might place +;; other RTL insns between SUB and SBC, possibly modifying the Carry +;; flag used by SBC. This might happen because most Thumb1 patterns +;; for flag-setting instructions do not have explicit RTL for setting +;; or clobbering the flags. Instead, they have the attribute "conds" +;; with value "set" or "clob". However, this attribute is not used to +;; identify dependencies and therefore the scheduler might reorder +;; these instruction. Currenly, this problem cannot happen because +;; there are no separate Thumb1 patterns for individual instruction +;; that consume flags (except conditional execution, which is treated +;; differently). In particular there is no Thumb1 armv6-m pattern for +;; sbc or adc. + + + (define_insn "*thumb1_adddi3" [(set (match_operand:DI 0 "register_operand" "=l") (plus:DI (match_operand:DI 1 "register_operand" "%0") -- 2.30.2