From 2a7325756a4df01bf22b324e106bd500d433e284 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Wed, 17 Apr 2002 10:24:03 +0200 Subject: [PATCH] re PR bootstrap/6315 (sparc64 gcc -mhard-quad-float cannot compile libstdc++-v3) PR bootstrap/6315 * config/sparc/sparc.md (movtf reg<-reg split): Allow spliting even if hard quad and register is not floating. (movtf reg<-mem split): Disallow splitting if hard quad and register is floating. (movtf mem<-reg split): Likewise. * config/sparc/sparc.c (fp_register_operand): New predicate. * config/sparc/sparc.h (PREDICATE_CODES): Add fp_register_operand. * gcc.dg/20020416-1.c: New test. From-SVN: r52412 --- gcc/ChangeLog | 11 +++++++++++ gcc/config/sparc/sparc.c | 14 ++++++++++++++ gcc/config/sparc/sparc.h | 1 + gcc/config/sparc/sparc.md | 13 ++++++++++--- gcc/testsuite/ChangeLog | 4 ++++ gcc/testsuite/gcc.dg/20020416-1.c | 16 ++++++++++++++++ 6 files changed, 56 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/20020416-1.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5c19dbe72dc..76871fd3c6c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2002-04-17 Jakub Jelinek + + PR bootstrap/6315 + * config/sparc/sparc.md (movtf reg<-reg split): Allow spliting + even if hard quad and register is not floating. + (movtf reg<-mem split): Disallow splitting if hard quad and + register is floating. + (movtf mem<-reg split): Likewise. + * config/sparc/sparc.c (fp_register_operand): New predicate. + * config/sparc/sparc.h (PREDICATE_CODES): Add fp_register_operand. + 2002-04-17 Zack Weinberg * Makefile.in (PROTO_OBJS): Add cppdefault.o. diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index ccfbc902f0b..f2b3585413b 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -484,6 +484,20 @@ fp_zero_operand (op, mode) return op == CONST0_RTX (mode); } +/* Nonzero if OP is a register operand in floating point register. */ + +int +fp_register_operand (op, mode) + rtx op; + enum machine_mode mode; +{ + if (! register_operand (op, mode)) + return 0; + if (GET_CODE (op) == SUBREG) + op = SUBREG_REG (op); + return GET_CODE (op) == REG && SPARC_FP_REG_P (REGNO (op)); +} + /* Nonzero if OP is a floating point constant which can be loaded into an integer register using a single sethi instruction. */ diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index d48b8ddb07a..fd15297c8a8 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -2947,6 +2947,7 @@ do { \ #define PREDICATE_CODES \ {"reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ {"fp_zero_operand", {CONST_DOUBLE}}, \ +{"fp_register_operand", {SUBREG, REG}}, \ {"intreg_operand", {SUBREG, REG}}, \ {"fcc_reg_operand", {REG}}, \ {"fcc0_reg_operand", {REG}}, \ diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index cc362dcb44f..d09f6487e84 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -3840,7 +3840,8 @@ "reload_completed && (! TARGET_ARCH64 || (TARGET_FPU - && ! TARGET_HARD_QUAD))" + && ! TARGET_HARD_QUAD) + || ! fp_register_operand (operands[0], TFmode))" [(clobber (const_int 0))] " { @@ -3902,7 +3903,10 @@ [(set (match_operand:TF 0 "register_operand" "") (match_operand:TF 1 "memory_operand" ""))] "(reload_completed - && offsettable_memref_p (operands[1]))" + && offsettable_memref_p (operands[1]) + && (! TARGET_ARCH64 + || ! TARGET_HARD_QUAD + || ! fp_register_operand (operands[0], TFmode)))" [(clobber (const_int 0))] " { @@ -3935,7 +3939,10 @@ [(set (match_operand:TF 0 "memory_operand" "") (match_operand:TF 1 "register_operand" ""))] "(reload_completed - && offsettable_memref_p (operands[0]))" + && offsettable_memref_p (operands[0]) + && (! TARGET_ARCH64 + || ! TARGET_HARD_QUAD + || ! fp_register_operand (operands[1], TFmode)))" [(clobber (const_int 0))] " { diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 826b30d6cba..36ea8b773b2 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2002-04-17 Jakub Jelinek + + * gcc.dg/20020416-1.c: New test. + 2002-04-16 Jakub Jelinek * gcc.dg/altivec-5.c: New test. diff --git a/gcc/testsuite/gcc.dg/20020416-1.c b/gcc/testsuite/gcc.dg/20020416-1.c new file mode 100644 index 00000000000..db1a2617fcd --- /dev/null +++ b/gcc/testsuite/gcc.dg/20020416-1.c @@ -0,0 +1,16 @@ +/* PR bootstrap/6315 */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-options "-O2 -mhard-quad-float" { target sparc*-*-* } } */ +/* { dg-options "-O2" { target sparclet*-*-* sparclite*-*-* sparc86x-*-* } } */ + +void bar (const char *, ...); + +void +foo (const char *x, long double y, int z) +{ + if (z >= 0) + bar (x, z, y); + else + bar (x, y); +} -- 2.30.2