From 2aab7999e45d2dc6c61e4fce094aa114d57e2c7a Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Mon, 30 Mar 2020 12:07:09 -0500 Subject: [PATCH] nir: Handle vec8/16 in lower_regs_to_ssa Reviewed-by: Alyssa Rosenzweig Reviewed-by: Ian Romanick Part-of: --- src/compiler/nir/nir_lower_regs_to_ssa.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/src/compiler/nir/nir_lower_regs_to_ssa.c b/src/compiler/nir/nir_lower_regs_to_ssa.c index 2e83c80af18..027c5db504c 100644 --- a/src/compiler/nir/nir_lower_regs_to_ssa.c +++ b/src/compiler/nir/nir_lower_regs_to_ssa.c @@ -178,13 +178,7 @@ rewrite_alu_instr(nir_alu_instr *alu, struct regs_to_ssa_state *state) nir_ssa_dest_init(&alu->instr, &alu->dest.dest, num_components, reg->bit_size, reg->name); - nir_op vecN_op; - switch (reg->num_components) { - case 2: vecN_op = nir_op_vec2; break; - case 3: vecN_op = nir_op_vec3; break; - case 4: vecN_op = nir_op_vec4; break; - default: unreachable("not reached"); - } + nir_op vecN_op = nir_op_vec(reg->num_components); nir_alu_instr *vec = nir_alu_instr_create(state->shader, vecN_op); -- 2.30.2