From 2ac23d05c0467d9a3b49ec8795ae783626c73914 Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Thu, 24 Jun 2004 01:51:30 +0000 Subject: [PATCH] mips.c (mips_use_dfa_pipeline_interface): Add R3000. 2004-06-23 Eric Christopher * config/mips/mips.c (mips_use_dfa_pipeline_interface): Add R3000. * config/mips/mips.md: Remove R3000 scheduling description. * config/mips/3000.md: New file. From-SVN: r83575 --- gcc/ChangeLog | 8 ++++- gcc/config/mips/3000.md | 69 +++++++++++++++++++++++++++++++++++++++++ gcc/config/mips/mips.c | 1 + gcc/config/mips/mips.md | 41 ++++++++++++------------ 4 files changed, 98 insertions(+), 21 deletions(-) create mode 100644 gcc/config/mips/3000.md diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8656a5f1688..d289f41e498 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2004-06-23 Eric Christopher + + * config/mips/mips.c (mips_use_dfa_pipeline_interface): Add R3000. + * config/mips/mips.md: Remove R3000 scheduling description. + * config/mips/3000.md: New file. + 2004-06-23 Ulrich Weigand * config/s390/s390-protos.h (s390_emit_compare): Add prototype. @@ -20,7 +26,7 @@ ("doloop"): Adapt. ("jump"): Convert to expander. Use s390_emit_jump. ("*jump_64", "*jump_31"): New insns. Improve length default. - + 2004-06-23 Wu Yongwei * gthr-win32.h (__GTHREAD_MUTEX_INIT_DEFAULT): Adjust. diff --git a/gcc/config/mips/3000.md b/gcc/config/mips/3000.md new file mode 100644 index 00000000000..92825978002 --- /dev/null +++ b/gcc/config/mips/3000.md @@ -0,0 +1,69 @@ +;; DFA based pipeline description for the r3000 +;; This is a special pipeline - this is also the default schedule and +;; so we need to schedule instructions that may not exist on the r2k/r3k. + +;; Generic processor description that assumes that the only latencies are for +;; hazards or delay slots, otherwise everything is assumed to issue and execute +;; in one cycle. +(define_automaton "r3k") + +(define_cpu_unit "r3k_alu" "r3k") + +(define_insn_reservation "r3k_generic_alu" 1 + (and (eq_attr "cpu" "r3000") + (eq_attr "type" "unknown,prefetch,prefetchx,condmove,mthilo,const,arith,shift,slt,clz,trap,fmove,fadd,fmadd,fabs,fneg,fcvt,fsqrt,frsqrt,multi,nop")) + "r3k_alu") + +(define_insn_reservation "r3k_load_alu" 2 + (and (eq_attr "cpu" "r3000") + (eq_attr "type" "load, fpload, fpidxload, xfer")) + "r3k_alu*2") + +(define_insn_reservation "r3k_call_alu" 2 + (and (eq_attr "cpu" "r3000") + (eq_attr "type" "branch,jump,call")) + "r3k_alu*2") + +(define_insn_reservation "r3k_hilo_alu" 3 + (and (eq_attr "cpu" "r3000") + (eq_attr "type" "mfhilo")) + "r3k_alu*3") + +(define_insn_reservation "r3k_fcmp_alu" 2 + (and (eq_attr "cpu" "r3000") + (eq_attr "type" "fcmp, fadd")) + "r3k_alu*2") + +(define_insn_reservation "r3k_imul_alu" 12 + (and (eq_attr "cpu" "r3000") + (eq_attr "type" "imul, imadd")) + "r3k_alu*12") + +(define_insn_reservation "r3k_idiv_alu" 35 + (and (eq_attr "cpu" "r3000") + (eq_attr "type" "idiv")) + "r3k_alu*35") + +(define_insn_reservation "r3k_fmul_single_alu" 4 + (and (eq_attr "cpu" "r3000") + (and (eq_attr "type" "fmul") + (eq_attr "mode" "SF"))) + "r3k_alu*4") + +(define_insn_reservation "r3k_fmul_double_alu" 5 + (and (eq_attr "cpu" "r3000") + (and (eq_attr "type" "fmul") + (eq_attr "mode" "DF"))) + "r3k_alu*5") + +(define_insn_reservation "r3k_fdiv_single_alu" 12 + (and (eq_attr "cpu" "r3000") + (and (eq_attr "type" "fdiv") + (eq_attr "mode" "SF"))) + "r3k_alu*12") + +(define_insn_reservation "r3k_fdiv_double_alu" 19 + (and (eq_attr "cpu" "r3000") + (and (eq_attr "type" "fdiv") + (eq_attr "mode" "DF"))) + "r3k_alu*19") diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index df00a5426e6..f481c4ba338 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -9930,6 +9930,7 @@ mips_use_dfa_pipeline_interface (void) { switch (mips_tune) { + case PROCESSOR_R3000: case PROCESSOR_R4130: case PROCESSOR_R5400: case PROCESSOR_R5500: diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 3235ff58e99..3dfb98dc005 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -326,12 +326,12 @@ (define_function_unit "memory" 1 0 (and (eq_attr "type" "load,fpload,fpidxload") - (eq_attr "cpu" "!r3000,r3900,r4600,r4650,r4100,r4120,r4300,r5000")) + (eq_attr "cpu" "r3900,r4600,r4650,r4100,r4120,r4300,r5000")) 3 0) (define_function_unit "memory" 1 0 (and (eq_attr "type" "load,fpload,fpidxload") - (eq_attr "cpu" "r3000,r3900,r4600,r4650,r4100,r4120,r4300,r5000")) + (eq_attr "cpu" "r3900,r4600,r4650,r4100,r4120,r4300,r5000")) 2 0) (define_function_unit "memory" 1 0 @@ -346,7 +346,7 @@ (define_function_unit "imuldiv" 1 0 (and (eq_attr "type" "imul,imadd") - (eq_attr "cpu" "!r3000,r3900,r4000,r4600,r4650,r4100,r4120,r4300,r5000")) + (eq_attr "cpu" "r3900,r4000,r4600,r4650,r4100,r4120,r4300,r5000")) 17 17) ;; On them mips16, we want to stronly discourage a mult from appearing @@ -360,7 +360,7 @@ 1 5) (define_function_unit "imuldiv" 1 0 - (and (eq_attr "type" "imul,imadd") (eq_attr "cpu" "r3000,r3900")) + (and (eq_attr "type" "imul,imadd") (eq_attr "cpu" "r3900")) 12 12) (define_function_unit "imuldiv" 1 0 @@ -398,11 +398,11 @@ (define_function_unit "imuldiv" 1 0 (and (eq_attr "type" "idiv") - (eq_attr "cpu" "!r3000,r3900,r4000,r4600,r4650,r4100,r4120,r4300,r5000")) + (eq_attr "cpu" "r3900,r4000,r4600,r4650,r4100,r4120,r4300,r5000")) 38 38) (define_function_unit "imuldiv" 1 0 - (and (eq_attr "type" "idiv") (eq_attr "cpu" "r3000,r3900")) + (and (eq_attr "type" "idiv") (eq_attr "cpu" "r3900")) 35 35) (define_function_unit "imuldiv" 1 0 @@ -455,11 +455,11 @@ ;; instructions to be processed in the "imuldiv" unit. (define_function_unit "adder" 1 1 - (and (eq_attr "type" "fcmp") (eq_attr "cpu" "!r3000,r3900,r6000,r4300,r5000")) + (and (eq_attr "type" "fcmp") (eq_attr "cpu" "r3900,r6000,r4300,r5000")) 3 0) (define_function_unit "adder" 1 1 - (and (eq_attr "type" "fcmp") (eq_attr "cpu" "r3000,r3900,r6000")) + (and (eq_attr "type" "fcmp") (eq_attr "cpu" "r3900,r6000")) 2 0) (define_function_unit "adder" 1 1 @@ -467,11 +467,11 @@ 1 0) (define_function_unit "adder" 1 1 - (and (eq_attr "type" "fadd") (eq_attr "cpu" "!r3000,r3900,r6000,r4300")) + (and (eq_attr "type" "fadd") (eq_attr "cpu" "r3900,r6000,r4300")) 4 0) (define_function_unit "adder" 1 1 - (and (eq_attr "type" "fadd") (eq_attr "cpu" "r3000,r3900")) + (and (eq_attr "type" "fadd") (eq_attr "cpu" "r3900")) 2 0) (define_function_unit "adder" 1 1 @@ -480,22 +480,22 @@ (define_function_unit "adder" 1 1 (and (eq_attr "type" "fabs,fneg,fmove") - (eq_attr "cpu" "!r3000,r3900,r4600,r4650,r4300,r5000")) + (eq_attr "cpu" "r3900,r4600,r4650,r4300,r5000")) 2 0) (define_function_unit "adder" 1 1 - (and (eq_attr "type" "fabs,fneg,fmove") (eq_attr "cpu" "r3000,r3900,r4600,r4650,r5000")) + (and (eq_attr "type" "fabs,fneg,fmove") (eq_attr "cpu" "r3900,r4600,r4650,r5000")) 1 0) (define_function_unit "mult" 1 1 (and (eq_attr "type" "fmul") (and (eq_attr "mode" "SF") - (eq_attr "cpu" "!r3000,r3900,r6000,r4600,r4650,r4300,r5000"))) + (eq_attr "cpu" "r3900,r6000,r4600,r4650,r4300,r5000"))) 7 0) (define_function_unit "mult" 1 1 (and (eq_attr "type" "fmul") - (and (eq_attr "mode" "SF") (eq_attr "cpu" "r3000,r3900,r5000"))) + (and (eq_attr "mode" "SF") (eq_attr "cpu" "r3900,r5000"))) 4 0) (define_function_unit "mult" 1 1 @@ -510,12 +510,12 @@ (define_function_unit "mult" 1 1 (and (eq_attr "type" "fmul") - (and (eq_attr "mode" "DF") (eq_attr "cpu" "!r3000,r3900,r6000,r4300,r5000"))) + (and (eq_attr "mode" "DF") (eq_attr "cpu" "r3900,r6000,r4300,r5000"))) 8 0) (define_function_unit "mult" 1 1 (and (eq_attr "type" "fmul") - (and (eq_attr "mode" "DF") (eq_attr "cpu" "r3000,r3900,r5000"))) + (and (eq_attr "mode" "DF") (eq_attr "cpu" "r3900,r5000"))) 5 0) (define_function_unit "mult" 1 1 @@ -526,12 +526,12 @@ (define_function_unit "divide" 1 1 (and (eq_attr "type" "fdiv") (and (eq_attr "mode" "SF") - (eq_attr "cpu" "!r3000,r3900,r6000,r4600,r4650,r4300,r5000"))) + (eq_attr "cpu" "r3900,r6000,r4600,r4650,r4300,r5000"))) 23 0) (define_function_unit "divide" 1 1 (and (eq_attr "type" "fdiv") - (and (eq_attr "mode" "SF") (eq_attr "cpu" "r3000,r3900"))) + (and (eq_attr "mode" "SF") (eq_attr "cpu" "r3900"))) 12 0) (define_function_unit "divide" 1 1 @@ -552,12 +552,12 @@ (define_function_unit "divide" 1 1 (and (eq_attr "type" "fdiv") (and (eq_attr "mode" "DF") - (eq_attr "cpu" "!r3000,r3900,r6000,r4600,r4650,r4300"))) + (eq_attr "cpu" "r3900,r6000,r4600,r4650,r4300"))) 36 0) (define_function_unit "divide" 1 1 (and (eq_attr "type" "fdiv") - (and (eq_attr "mode" "DF") (eq_attr "cpu" "r3000,r3900"))) + (and (eq_attr "mode" "DF") (eq_attr "cpu" "r3900"))) 19 0) (define_function_unit "divide" 1 1 @@ -631,6 +631,7 @@ ;; Include scheduling descriptions. +(include "3000.md") (include "4130.md") (include "5400.md") (include "5500.md") -- 2.30.2