From 2ad83778bf1be44106da0224e9b27e8021e2eb8d Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Mon, 26 Nov 2018 15:21:00 +0100 Subject: [PATCH] bios: allow testing main_ram at init when using an external controller --- litex/soc/software/bios/main.c | 4 ++++ litex/soc/software/bios/sdram.c | 9 ++++++++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/litex/soc/software/bios/main.c b/litex/soc/software/bios/main.c index 6ec19b51..89a3b9cc 100644 --- a/litex/soc/software/bios/main.c +++ b/litex/soc/software/bios/main.c @@ -540,8 +540,12 @@ int main(int i, char **c) #endif #ifdef CSR_SDRAM_BASE sdr_ok = sdrinit(); +#else +#ifdef MAIN_RAM_TEST + sdr_ok = memtest(); #else sdr_ok = 1; +#endif #endif if(sdr_ok) boot_sequence(); diff --git a/litex/soc/software/bios/sdram.c b/litex/soc/software/bios/sdram.c index 17474c1a..291efc83 100644 --- a/litex/soc/software/bios/sdram.c +++ b/litex/soc/software/bios/sdram.c @@ -1,10 +1,11 @@ #include -#ifdef CSR_SDRAM_BASE #include #include +#ifdef CSR_SDRAM_BASE #include +#endif #include #include #include @@ -31,6 +32,8 @@ static void cdelay(int i) } } +#ifdef CSR_SDRAM_BASE + void sdrsw(void) { sdram_dfii_control_write(DFII_CONTROL_CKE|DFII_CONTROL_ODT|DFII_CONTROL_RESET_N); @@ -509,6 +512,8 @@ static void read_level(int module) } #endif /* CSR_DDRPHY_BASE */ +#endif /* CSR_SDRAM_BASE */ + static unsigned int seed_to_data_32(unsigned int seed, int random) { if (random) @@ -676,6 +681,8 @@ int memtest(void) } } +#ifdef CSR_SDRAM_BASE + #ifdef CSR_DDRPHY_BASE int sdrlevel(void) { -- 2.30.2