From 2af9a2c55b5a5e5e17c484ebfc9bcaabf6cb6781 Mon Sep 17 00:00:00 2001 From: Staf Verhaegen Date: Fri, 6 Dec 2019 19:07:41 +0100 Subject: [PATCH] [broken]Move code Moved files without any changes to easily track later changes. --- {sim/cocotb => c4m/cocotb/jtag}/c4m_jtag.py | 0 {sim/cocotb => c4m/cocotb/jtag}/c4m_jtag_svfcocotb.py | 0 {sim/cocotb => c4m/cocotb/jtag}/c4m_jtag_svfgrammar.py | 0 {rtl/nmigen => c4m/nmigen/jtag}/jtag.py | 0 {rtl/vhdl => c4m/vhdl/jtag}/c4m_jtag_idblock.vhdl | 0 {rtl/vhdl => c4m/vhdl/jtag}/c4m_jtag_ioblock.vhdl | 0 {rtl/vhdl => c4m/vhdl/jtag}/c4m_jtag_iocell.vhdl | 0 {rtl/vhdl => c4m/vhdl/jtag}/c4m_jtag_irblock.vhdl | 0 {rtl/vhdl => c4m/vhdl/jtag}/c4m_jtag_pkg.vhdl | 0 {rtl/vhdl => c4m/vhdl/jtag}/c4m_jtag_tap_controller.vhdl | 0 {rtl/vhdl => c4m/vhdl/jtag}/c4m_jtag_tap_fsm.vhdl | 0 {sim => test}/cocotb/controller/Makefile | 0 {sim => test}/cocotb/controller/c4m_jtag.py | 0 {sim => test}/cocotb/controller/test.py | 0 {sim => test}/cocotb/dual_parallel/Makefile | 0 {sim => test}/cocotb/dual_parallel/c4m_jtag.py | 0 {sim => test}/cocotb/dual_parallel/dual_parallel.vhdl | 0 {sim => test}/cocotb/dual_parallel/test.py | 0 {sim/ghdl => test/ghdl/idcode}/bench_idcode.sh | 0 {bench => test/rtl}/vhdl/idcode.vhdl | 0 {bench => test/rtl}/vhdl/sampleshift.vhdl | 0 21 files changed, 0 insertions(+), 0 deletions(-) rename {sim/cocotb => c4m/cocotb/jtag}/c4m_jtag.py (100%) rename {sim/cocotb => c4m/cocotb/jtag}/c4m_jtag_svfcocotb.py (100%) rename {sim/cocotb => c4m/cocotb/jtag}/c4m_jtag_svfgrammar.py (100%) rename {rtl/nmigen => c4m/nmigen/jtag}/jtag.py (100%) rename {rtl/vhdl => c4m/vhdl/jtag}/c4m_jtag_idblock.vhdl (100%) rename {rtl/vhdl => c4m/vhdl/jtag}/c4m_jtag_ioblock.vhdl (100%) rename {rtl/vhdl => c4m/vhdl/jtag}/c4m_jtag_iocell.vhdl (100%) rename {rtl/vhdl => c4m/vhdl/jtag}/c4m_jtag_irblock.vhdl (100%) rename {rtl/vhdl => c4m/vhdl/jtag}/c4m_jtag_pkg.vhdl (100%) rename {rtl/vhdl => c4m/vhdl/jtag}/c4m_jtag_tap_controller.vhdl (100%) rename {rtl/vhdl => c4m/vhdl/jtag}/c4m_jtag_tap_fsm.vhdl (100%) rename {sim => test}/cocotb/controller/Makefile (100%) rename {sim => test}/cocotb/controller/c4m_jtag.py (100%) rename {sim => test}/cocotb/controller/test.py (100%) rename {sim => test}/cocotb/dual_parallel/Makefile (100%) rename {sim => test}/cocotb/dual_parallel/c4m_jtag.py (100%) rename {sim => test}/cocotb/dual_parallel/dual_parallel.vhdl (100%) rename {sim => test}/cocotb/dual_parallel/test.py (100%) rename {sim/ghdl => test/ghdl/idcode}/bench_idcode.sh (100%) rename {bench => test/rtl}/vhdl/idcode.vhdl (100%) rename {bench => test/rtl}/vhdl/sampleshift.vhdl (100%) diff --git a/sim/cocotb/c4m_jtag.py b/c4m/cocotb/jtag/c4m_jtag.py similarity index 100% rename from sim/cocotb/c4m_jtag.py rename to c4m/cocotb/jtag/c4m_jtag.py diff --git a/sim/cocotb/c4m_jtag_svfcocotb.py b/c4m/cocotb/jtag/c4m_jtag_svfcocotb.py similarity index 100% rename from sim/cocotb/c4m_jtag_svfcocotb.py rename to c4m/cocotb/jtag/c4m_jtag_svfcocotb.py diff --git a/sim/cocotb/c4m_jtag_svfgrammar.py b/c4m/cocotb/jtag/c4m_jtag_svfgrammar.py similarity index 100% rename from sim/cocotb/c4m_jtag_svfgrammar.py rename to c4m/cocotb/jtag/c4m_jtag_svfgrammar.py diff --git a/rtl/nmigen/jtag.py b/c4m/nmigen/jtag/jtag.py similarity index 100% rename from rtl/nmigen/jtag.py rename to c4m/nmigen/jtag/jtag.py diff --git a/rtl/vhdl/c4m_jtag_idblock.vhdl b/c4m/vhdl/jtag/c4m_jtag_idblock.vhdl similarity index 100% rename from rtl/vhdl/c4m_jtag_idblock.vhdl rename to c4m/vhdl/jtag/c4m_jtag_idblock.vhdl diff --git a/rtl/vhdl/c4m_jtag_ioblock.vhdl b/c4m/vhdl/jtag/c4m_jtag_ioblock.vhdl similarity index 100% rename from rtl/vhdl/c4m_jtag_ioblock.vhdl rename to c4m/vhdl/jtag/c4m_jtag_ioblock.vhdl diff --git a/rtl/vhdl/c4m_jtag_iocell.vhdl b/c4m/vhdl/jtag/c4m_jtag_iocell.vhdl similarity index 100% rename from rtl/vhdl/c4m_jtag_iocell.vhdl rename to c4m/vhdl/jtag/c4m_jtag_iocell.vhdl diff --git a/rtl/vhdl/c4m_jtag_irblock.vhdl b/c4m/vhdl/jtag/c4m_jtag_irblock.vhdl similarity index 100% rename from rtl/vhdl/c4m_jtag_irblock.vhdl rename to c4m/vhdl/jtag/c4m_jtag_irblock.vhdl diff --git a/rtl/vhdl/c4m_jtag_pkg.vhdl b/c4m/vhdl/jtag/c4m_jtag_pkg.vhdl similarity index 100% rename from rtl/vhdl/c4m_jtag_pkg.vhdl rename to c4m/vhdl/jtag/c4m_jtag_pkg.vhdl diff --git a/rtl/vhdl/c4m_jtag_tap_controller.vhdl b/c4m/vhdl/jtag/c4m_jtag_tap_controller.vhdl similarity index 100% rename from rtl/vhdl/c4m_jtag_tap_controller.vhdl rename to c4m/vhdl/jtag/c4m_jtag_tap_controller.vhdl diff --git a/rtl/vhdl/c4m_jtag_tap_fsm.vhdl b/c4m/vhdl/jtag/c4m_jtag_tap_fsm.vhdl similarity index 100% rename from rtl/vhdl/c4m_jtag_tap_fsm.vhdl rename to c4m/vhdl/jtag/c4m_jtag_tap_fsm.vhdl diff --git a/sim/cocotb/controller/Makefile b/test/cocotb/controller/Makefile similarity index 100% rename from sim/cocotb/controller/Makefile rename to test/cocotb/controller/Makefile diff --git a/sim/cocotb/controller/c4m_jtag.py b/test/cocotb/controller/c4m_jtag.py similarity index 100% rename from sim/cocotb/controller/c4m_jtag.py rename to test/cocotb/controller/c4m_jtag.py diff --git a/sim/cocotb/controller/test.py b/test/cocotb/controller/test.py similarity index 100% rename from sim/cocotb/controller/test.py rename to test/cocotb/controller/test.py diff --git a/sim/cocotb/dual_parallel/Makefile b/test/cocotb/dual_parallel/Makefile similarity index 100% rename from sim/cocotb/dual_parallel/Makefile rename to test/cocotb/dual_parallel/Makefile diff --git a/sim/cocotb/dual_parallel/c4m_jtag.py b/test/cocotb/dual_parallel/c4m_jtag.py similarity index 100% rename from sim/cocotb/dual_parallel/c4m_jtag.py rename to test/cocotb/dual_parallel/c4m_jtag.py diff --git a/sim/cocotb/dual_parallel/dual_parallel.vhdl b/test/cocotb/dual_parallel/dual_parallel.vhdl similarity index 100% rename from sim/cocotb/dual_parallel/dual_parallel.vhdl rename to test/cocotb/dual_parallel/dual_parallel.vhdl diff --git a/sim/cocotb/dual_parallel/test.py b/test/cocotb/dual_parallel/test.py similarity index 100% rename from sim/cocotb/dual_parallel/test.py rename to test/cocotb/dual_parallel/test.py diff --git a/sim/ghdl/bench_idcode.sh b/test/ghdl/idcode/bench_idcode.sh similarity index 100% rename from sim/ghdl/bench_idcode.sh rename to test/ghdl/idcode/bench_idcode.sh diff --git a/bench/vhdl/idcode.vhdl b/test/rtl/vhdl/idcode.vhdl similarity index 100% rename from bench/vhdl/idcode.vhdl rename to test/rtl/vhdl/idcode.vhdl diff --git a/bench/vhdl/sampleshift.vhdl b/test/rtl/vhdl/sampleshift.vhdl similarity index 100% rename from bench/vhdl/sampleshift.vhdl rename to test/rtl/vhdl/sampleshift.vhdl -- 2.30.2