From 2b25763bcea8253f124fca96197ce8688f9403ff Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Mon, 3 Oct 2011 16:41:07 +0000 Subject: [PATCH] Minor fixups to the sparc bmask/bshuffle patterns. * config/sparc/sparc.md (bmask_vis): Split into explicit 'di' and 'si' patterns which describe the GSR changes explicitly in the RTL using zero_extract. (bshuffle_vis): Put the GSR use inside of the unspec. From-SVN: r179465 --- gcc/ChangeLog | 7 +++++++ gcc/config/sparc/sparc.md | 27 +++++++++++++++++++-------- 2 files changed, 26 insertions(+), 8 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 028ce8e12b7..9fcee40ec13 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2011-10-03 David S. Miller + + * config/sparc/sparc.md (bmask_vis): Split into explicit 'di' + and 'si' patterns which describe the GSR changes explicitly in the + RTL using zero_extract. + (bshuffle_vis): Put the GSR use inside of the unspec. + 2011-10-03 Artem Shinkarov * optabs.c (expand_vec_shuffle_expr_p): New function. Checks diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 699074682f6..c48c979dba8 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -8228,11 +8228,22 @@ "array32\t%r1, %r2, %0" [(set_attr "type" "array")]) -(define_insn "bmask_vis" - [(set (match_operand:P 0 "register_operand" "=r") - (plus:P (match_operand:P 1 "register_operand" "rJ") - (match_operand:P 2 "register_operand" "rJ"))) - (clobber (reg:SI GSR_REG))] +(define_insn "bmaskdi_vis" + [(set (match_operand:DI 0 "register_operand" "=r") + (plus:DI (match_operand:DI 1 "register_operand" "rJ") + (match_operand:DI 2 "register_operand" "rJ"))) + (set (zero_extract:DI (reg:DI GSR_REG) (const_int 32) (const_int 32)) + (plus:DI (match_dup 1) (match_dup 2)))] + "TARGET_VIS2" + "bmask\t%r1, %r2, %0" + [(set_attr "type" "array")]) + +(define_insn "bmasksi_vis" + [(set (match_operand:SI 0 "register_operand" "=r") + (plus:SI (match_operand:SI 1 "register_operand" "rJ") + (match_operand:SI 2 "register_operand" "rJ"))) + (set (zero_extract:DI (reg:DI GSR_REG) (const_int 32) (const_int 32)) + (zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))] "TARGET_VIS2" "bmask\t%r1, %r2, %0" [(set_attr "type" "array")]) @@ -8240,9 +8251,9 @@ (define_insn "bshuffle_vis" [(set (match_operand:V64I 0 "register_operand" "=e") (unspec:V64I [(match_operand:V64I 1 "register_operand" "e") - (match_operand:V64I 2 "register_operand" "e")] - UNSPEC_BSHUFFLE)) - (use (reg:SI GSR_REG))] + (match_operand:V64I 2 "register_operand" "e") + (use (reg:SI GSR_REG))] + UNSPEC_BSHUFFLE))] "TARGET_VIS2" "bshuffle\t%1, %2, %0" [(set_attr "type" "fga") -- 2.30.2