From 2c5447d988ec4cc8eaa4d2bf029e46b6e939d654 Mon Sep 17 00:00:00 2001 From: Richard Kenner Date: Sat, 1 Feb 1997 19:11:01 -0500 Subject: [PATCH] (movqi): Enable use of clr and st insns on TARGET_5200. From-SVN: r13576 --- gcc/config/m68k/m68k.md | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index c242f42e0f1..83d38793fb6 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -993,12 +993,13 @@ /* clr and st insns on 68000 read before writing. This isn't so on the 68010, but we have no TARGET_68010. */ if (!ADDRESS_REG_P (operands[0]) - && (TARGET_68020 + && ((TARGET_68020 || TARGET_5200) || !(GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0])))) { if (operands[1] == const0_rtx) return \"clr%.b %0\"; - if (GET_CODE (operands[1]) == CONST_INT + if ((!TARGET_5200 || DATA_REG_P (operands[0])) + && GET_CODE (operands[1]) == CONST_INT && (INTVAL (operands[1]) & 255) == 255) { CC_STATUS_INIT; @@ -4356,13 +4357,13 @@ "!TARGET_5200" "lsl%.b %1,%0") -;; On all 68k models, this makes faster code in a special case. +;; On most 68k models, this makes faster code in a special case. (define_insn "ashrsi_16" [(set (match_operand:SI 0 "register_operand" "=d") (ashiftrt:SI (match_operand:SI 1 "register_operand" "0") (const_int 16)))] - "" + "!TARGET_68060" "swap %0\;ext%.l %0") ;; On the 68000, this makes faster code in a special case. -- 2.30.2