From 2ce8648ea81d401318d595b2adf9b48d18acc93e Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 9 May 2020 14:59:30 +0100 Subject: [PATCH] missing sticky-overflow pass-through from middle stage --- src/soc/alu/main_stage.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/soc/alu/main_stage.py b/src/soc/alu/main_stage.py index e801c966..07fb0180 100644 --- a/src/soc/alu/main_stage.py +++ b/src/soc/alu/main_stage.py @@ -39,7 +39,9 @@ class ALUMainStage(PipeModBase): with m.Case(InternalOp.OP_XOR): comb += self.o.o.eq(self.i.a ^ self.i.b) + ###### sticky overflow and context, both pass-through ##### + comb += so.eq(self.i.so) comb += self.o.ctx.eq(self.i.ctx) return m -- 2.30.2