From 2cf09a996629e3996235ab3c16e2bab8a98b276f Mon Sep 17 00:00:00 2001
From: Kito Cheng <kito.cheng@gmail.com>
Date: Wed, 4 Apr 2018 09:32:31 +0000
Subject: [PATCH] [NDS32] Implement movmisalignsi and movmisaligndi pattern.

gcc/
	* config/nds32/nds32.md (movmisalign<mode>): New pattern.

Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r259073
---
 gcc/ChangeLog             |  5 +++++
 gcc/config/nds32/nds32.md | 21 +++++++++++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3555f35e18c..8f97ac2bc38 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2018-04-04  Kito Cheng  <kito.cheng@gmail.com>
+	    Monk Chiang  <sh.chiang04@gmail.com>
+
+	* config/nds32/nds32.md (movmisalign<mode>): New pattern.
+
 2018-04-04  Chung-Ju Wu  <jasonwucj@gmail.com>
 
 	* config/nds32/nds32.md (movqi, movhi): Merge into mov<mode>.
diff --git a/gcc/config/nds32/nds32.md b/gcc/config/nds32/nds32.md
index 9a12598e211..68fe1b3c7f0 100644
--- a/gcc/config/nds32/nds32.md
+++ b/gcc/config/nds32/nds32.md
@@ -101,6 +101,27 @@
     }
 })
 
+(define_expand "movmisalign<mode>"
+  [(set (match_operand:SIDI 0 "general_operand" "")
+	(match_operand:SIDI 1 "general_operand" ""))]
+  ""
+{
+  rtx addr;
+  if (MEM_P (operands[0]) && !REG_P (operands[1]))
+    operands[1] = force_reg (<MODE>mode, operands[1]);
+
+  if (MEM_P (operands[0]))
+    {
+      addr = force_reg (Pmode, XEXP (operands[0], 0));
+      emit_insn (gen_unaligned_store<mode> (addr, operands[1]));
+    }
+  else
+    {
+      addr = force_reg (Pmode, XEXP (operands[1], 0));
+      emit_insn (gen_unaligned_load<mode> (operands[0], addr));
+    }
+  DONE;
+})
 
 (define_expand "movsi"
   [(set (match_operand:SI 0 "general_operand" "")
-- 
2.30.2