From 2d1027c7357d92b8cae4c15f55ad97b8fe81707b Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 9 Mar 2020 13:42:31 +0000 Subject: [PATCH] move all source directories to soc so that "import soc.scoreboard" etc is used --- src/{ => soc}/TLB/.gitignore | 0 src/{ => soc}/TLB/AddressEncoder.py | 0 src/{ => soc}/TLB/Cam.py | 0 src/{ => soc}/TLB/CamEntry.py | 0 src/{ => soc}/TLB/LFSR.py | 0 src/{ => soc}/TLB/LFSR.pyi | 0 src/{ => soc}/TLB/Makefile | 0 src/{ => soc}/TLB/MemorySet.py | 0 src/{ => soc}/TLB/PermissionValidator.py | 0 src/{ => soc}/TLB/PteEntry.py | 0 src/{ => soc}/TLB/SetAssociativeCache.py | 0 src/{ => soc}/TLB/TLB.py | 0 src/{ => soc}/TLB/__init__.py | 0 src/{ => soc}/TLB/ariane/TreePLRU.cpp | 0 src/{ => soc}/TLB/ariane/__init__.py | 0 src/{ => soc}/TLB/ariane/exceptcause.py | 0 src/{ => soc}/TLB/ariane/miss_handler.py | 0 src/{ => soc}/TLB/ariane/mmu.py | 0 src/{ => soc}/TLB/ariane/p_lru.txt | 0 src/{ => soc}/TLB/ariane/plru.py | 0 src/{ => soc}/TLB/ariane/ptw.py | 0 src/{ => soc}/TLB/ariane/test/test_plru.py | 0 src/{ => soc}/TLB/ariane/test/test_ptw.py | 0 src/{ => soc}/TLB/ariane/test/test_tlb.py | 0 src/{ => soc}/TLB/ariane/test/test_tlb_content.py | 0 src/{ => soc}/TLB/ariane/tlb.py | 0 src/{ => soc}/TLB/ariane/tlb_content.py | 0 src/{ => soc}/TLB/test/__init__.py | 0 src/{ => soc}/TLB/test/test_LFSR2.py | 0 src/{ => soc}/TLB/test/test_address_encoder.py | 0 src/{ => soc}/TLB/test/test_cam.py | 0 src/{ => soc}/TLB/test/test_cam_entry.py | 0 src/{ => soc}/TLB/test/test_permission_validator.py | 0 src/{ => soc}/TLB/test/test_pte_entry.py | 0 src/{ => soc}/TLB/test/test_set_associative_cache.py | 0 src/{ => soc}/TLB/test/test_tlb.py | 0 src/{ => soc}/TestUtil/test_helper.py | 0 src/{ => soc}/decoder/.gitignore | 0 src/{ => soc}/decoder/power_decoder.py | 0 src/{ => soc}/decoder/power_decoder2.py | 0 src/{ => soc}/decoder/power_enums.py | 0 src/{ => soc}/decoder/power_fields.py | 0 src/{ => soc}/decoder/power_fieldsn.py | 0 src/{ => soc}/decoder/test/test_power_decoder.py | 0 src/{ => soc}/experiment/alu_hier.py | 0 src/{ => soc}/experiment/compalu.py | 0 src/{ => soc}/experiment/compldst.py | 0 src/{ => soc}/experiment/cscore.py | 0 src/{ => soc}/experiment/score6600.py | 0 src/{ => soc}/iommu/axi_rab/axi4_ar_buffer.py | 0 src/{ => soc}/iommu/axi_rab/axi4_ar_sender.py | 0 src/{ => soc}/iommu/axi_rab/axi4_aw_buffer.py | 0 src/{ => soc}/iommu/axi_rab/axi4_aw_sender.py | 0 src/{ => soc}/iommu/axi_rab/axi4_b_buffer.py | 0 src/{ => soc}/iommu/axi_rab/axi4_b_sender.py | 0 src/{ => soc}/iommu/axi_rab/axi4_r_buffer.py | 0 src/{ => soc}/iommu/axi_rab/axi4_r_sender.py | 0 src/{ => soc}/iommu/axi_rab/axi4_w_buffer.py | 0 src/{ => soc}/iommu/axi_rab/axi4_w_sender.py | 0 src/{ => soc}/iommu/axi_rab/axi_buffer_rab.py | 0 src/{ => soc}/iommu/axi_rab/axi_buffer_rab_bram.py | 0 src/{ => soc}/iommu/axi_rab/axi_rab_cfg.py | 0 src/{ => soc}/iommu/axi_rab/axi_rab_top.py | 0 src/{ => soc}/iommu/axi_rab/check_ram.py | 0 src/{ => soc}/iommu/axi_rab/coreconfig.py | 0 src/{ => soc}/iommu/axi_rab/fsm.py | 0 src/{ => soc}/iommu/axi_rab/l2_tlb.py | 0 src/{ => soc}/iommu/axi_rab/rab_core.py | 0 src/{ => soc}/iommu/axi_rab/rab_slice.py | 0 src/{ => soc}/iommu/axi_rab/ram_tp_no_change.py | 0 src/{ => soc}/iommu/axi_rab/ram_tp_write_first.py | 0 src/{ => soc}/iommu/axi_rab/slice_top.py | 0 src/{ => soc}/iommu/axi_rab/test/test_ram_tp_no_change.py | 0 src/{ => soc}/iommu/axi_rab/test/test_slice_top.py | 0 src/{ => soc}/regfile/regfile.py | 0 src/{ => soc}/scoreboard/__init__.py | 0 src/{ => soc}/scoreboard/addr_match.py | 0 src/{ => soc}/scoreboard/dependence_cell.py | 0 src/{ => soc}/scoreboard/fn_unit.py | 0 src/{ => soc}/scoreboard/fu_dep_cell.py | 0 src/{ => soc}/scoreboard/fu_fu_matrix.py | 0 src/{ => soc}/scoreboard/fu_mem_matrix.py | 0 src/{ => soc}/scoreboard/fu_mem_picker_vec.py | 0 src/{ => soc}/scoreboard/fu_picker_vec.py | 0 src/{ => soc}/scoreboard/fu_reg_matrix.py | 0 src/{ => soc}/scoreboard/fu_wr_pending.py | 0 src/{ => soc}/scoreboard/fumem_dep_cell.py | 0 src/{ => soc}/scoreboard/global_pending.py | 0 src/{ => soc}/scoreboard/group_picker.py | 0 src/{ => soc}/scoreboard/instruction_q.py | 0 src/{ => soc}/scoreboard/issue_unit.py | 0 src/{ => soc}/scoreboard/ldst_dep_cell.py | 0 src/{ => soc}/scoreboard/ldst_matrix.py | 0 src/{ => soc}/scoreboard/mdm.py | 0 src/{ => soc}/scoreboard/mem_dependence_cell.py | 0 src/{ => soc}/scoreboard/mem_fu_matrix.py | 0 src/{ => soc}/scoreboard/mem_fu_pending.py | 0 src/{ => soc}/scoreboard/mem_select.py | 0 src/{ => soc}/scoreboard/memfu.py | 0 src/{ => soc}/scoreboard/reg_select.py | 0 src/{ => soc}/scoreboard/shadow.py | 0 src/{ => soc}/scoreboard/shadow_fn.py | 0 src/{ => soc}/scoreboard/test_iq.py | 0 src/{ => soc}/scoreboard/test_mem2_fu_matrix.py | 0 src/{ => soc}/scoreboard/test_mem_fu_matrix.py | 0 105 files changed, 0 insertions(+), 0 deletions(-) rename src/{ => soc}/TLB/.gitignore (100%) rename src/{ => soc}/TLB/AddressEncoder.py (100%) rename src/{ => soc}/TLB/Cam.py (100%) rename src/{ => soc}/TLB/CamEntry.py (100%) rename src/{ => soc}/TLB/LFSR.py (100%) rename src/{ => soc}/TLB/LFSR.pyi (100%) rename src/{ => soc}/TLB/Makefile (100%) rename src/{ => soc}/TLB/MemorySet.py (100%) rename src/{ => soc}/TLB/PermissionValidator.py (100%) rename src/{ => soc}/TLB/PteEntry.py (100%) rename src/{ => soc}/TLB/SetAssociativeCache.py (100%) rename src/{ => soc}/TLB/TLB.py (100%) rename src/{ => soc}/TLB/__init__.py (100%) rename src/{ => soc}/TLB/ariane/TreePLRU.cpp (100%) rename src/{ => soc}/TLB/ariane/__init__.py (100%) rename src/{ => soc}/TLB/ariane/exceptcause.py (100%) rename src/{ => soc}/TLB/ariane/miss_handler.py (100%) rename src/{ => soc}/TLB/ariane/mmu.py (100%) rename src/{ => soc}/TLB/ariane/p_lru.txt (100%) rename src/{ => soc}/TLB/ariane/plru.py (100%) rename src/{ => soc}/TLB/ariane/ptw.py (100%) rename src/{ => soc}/TLB/ariane/test/test_plru.py (100%) rename src/{ => soc}/TLB/ariane/test/test_ptw.py (100%) rename src/{ => soc}/TLB/ariane/test/test_tlb.py (100%) rename src/{ => soc}/TLB/ariane/test/test_tlb_content.py (100%) rename src/{ => soc}/TLB/ariane/tlb.py (100%) rename src/{ => soc}/TLB/ariane/tlb_content.py (100%) rename src/{ => soc}/TLB/test/__init__.py (100%) rename src/{ => soc}/TLB/test/test_LFSR2.py (100%) rename src/{ => soc}/TLB/test/test_address_encoder.py (100%) rename src/{ => soc}/TLB/test/test_cam.py (100%) rename src/{ => soc}/TLB/test/test_cam_entry.py (100%) rename src/{ => soc}/TLB/test/test_permission_validator.py (100%) rename src/{ => soc}/TLB/test/test_pte_entry.py (100%) rename src/{ => soc}/TLB/test/test_set_associative_cache.py (100%) rename src/{ => soc}/TLB/test/test_tlb.py (100%) rename src/{ => soc}/TestUtil/test_helper.py (100%) rename src/{ => soc}/decoder/.gitignore (100%) rename src/{ => soc}/decoder/power_decoder.py (100%) rename src/{ => soc}/decoder/power_decoder2.py (100%) rename src/{ => soc}/decoder/power_enums.py (100%) rename src/{ => soc}/decoder/power_fields.py (100%) rename src/{ => soc}/decoder/power_fieldsn.py (100%) rename src/{ => soc}/decoder/test/test_power_decoder.py (100%) rename src/{ => soc}/experiment/alu_hier.py (100%) rename src/{ => soc}/experiment/compalu.py (100%) rename src/{ => soc}/experiment/compldst.py (100%) rename src/{ => soc}/experiment/cscore.py (100%) rename src/{ => soc}/experiment/score6600.py (100%) rename src/{ => soc}/iommu/axi_rab/axi4_ar_buffer.py (100%) rename src/{ => soc}/iommu/axi_rab/axi4_ar_sender.py (100%) rename src/{ => soc}/iommu/axi_rab/axi4_aw_buffer.py (100%) rename src/{ => soc}/iommu/axi_rab/axi4_aw_sender.py (100%) rename src/{ => soc}/iommu/axi_rab/axi4_b_buffer.py (100%) rename src/{ => soc}/iommu/axi_rab/axi4_b_sender.py (100%) rename src/{ => soc}/iommu/axi_rab/axi4_r_buffer.py (100%) rename src/{ => soc}/iommu/axi_rab/axi4_r_sender.py (100%) rename src/{ => soc}/iommu/axi_rab/axi4_w_buffer.py (100%) rename src/{ => soc}/iommu/axi_rab/axi4_w_sender.py (100%) rename src/{ => soc}/iommu/axi_rab/axi_buffer_rab.py (100%) rename src/{ => soc}/iommu/axi_rab/axi_buffer_rab_bram.py (100%) rename src/{ => soc}/iommu/axi_rab/axi_rab_cfg.py (100%) rename src/{ => soc}/iommu/axi_rab/axi_rab_top.py (100%) rename src/{ => soc}/iommu/axi_rab/check_ram.py (100%) rename src/{ => soc}/iommu/axi_rab/coreconfig.py (100%) rename src/{ => soc}/iommu/axi_rab/fsm.py (100%) rename src/{ => soc}/iommu/axi_rab/l2_tlb.py (100%) rename src/{ => soc}/iommu/axi_rab/rab_core.py (100%) rename src/{ => soc}/iommu/axi_rab/rab_slice.py (100%) rename src/{ => soc}/iommu/axi_rab/ram_tp_no_change.py (100%) rename src/{ => soc}/iommu/axi_rab/ram_tp_write_first.py (100%) rename src/{ => soc}/iommu/axi_rab/slice_top.py (100%) rename src/{ => soc}/iommu/axi_rab/test/test_ram_tp_no_change.py (100%) rename src/{ => soc}/iommu/axi_rab/test/test_slice_top.py (100%) rename src/{ => soc}/regfile/regfile.py (100%) rename src/{ => soc}/scoreboard/__init__.py (100%) rename src/{ => soc}/scoreboard/addr_match.py (100%) rename src/{ => soc}/scoreboard/dependence_cell.py (100%) rename src/{ => soc}/scoreboard/fn_unit.py (100%) rename src/{ => soc}/scoreboard/fu_dep_cell.py (100%) rename src/{ => soc}/scoreboard/fu_fu_matrix.py (100%) rename src/{ => soc}/scoreboard/fu_mem_matrix.py (100%) rename src/{ => soc}/scoreboard/fu_mem_picker_vec.py (100%) rename src/{ => soc}/scoreboard/fu_picker_vec.py (100%) rename src/{ => soc}/scoreboard/fu_reg_matrix.py (100%) rename src/{ => soc}/scoreboard/fu_wr_pending.py (100%) rename src/{ => soc}/scoreboard/fumem_dep_cell.py (100%) rename src/{ => soc}/scoreboard/global_pending.py (100%) rename src/{ => soc}/scoreboard/group_picker.py (100%) rename src/{ => soc}/scoreboard/instruction_q.py (100%) rename src/{ => soc}/scoreboard/issue_unit.py (100%) rename src/{ => soc}/scoreboard/ldst_dep_cell.py (100%) rename src/{ => soc}/scoreboard/ldst_matrix.py (100%) rename src/{ => soc}/scoreboard/mdm.py (100%) rename src/{ => soc}/scoreboard/mem_dependence_cell.py (100%) rename src/{ => soc}/scoreboard/mem_fu_matrix.py (100%) rename src/{ => soc}/scoreboard/mem_fu_pending.py (100%) rename src/{ => soc}/scoreboard/mem_select.py (100%) rename src/{ => soc}/scoreboard/memfu.py (100%) rename src/{ => soc}/scoreboard/reg_select.py (100%) rename src/{ => soc}/scoreboard/shadow.py (100%) rename src/{ => soc}/scoreboard/shadow_fn.py (100%) rename src/{ => soc}/scoreboard/test_iq.py (100%) rename src/{ => soc}/scoreboard/test_mem2_fu_matrix.py (100%) rename src/{ => soc}/scoreboard/test_mem_fu_matrix.py (100%) diff --git a/src/TLB/.gitignore b/src/soc/TLB/.gitignore similarity index 100% rename from src/TLB/.gitignore rename to src/soc/TLB/.gitignore diff --git a/src/TLB/AddressEncoder.py b/src/soc/TLB/AddressEncoder.py similarity index 100% rename from src/TLB/AddressEncoder.py rename to src/soc/TLB/AddressEncoder.py diff --git a/src/TLB/Cam.py b/src/soc/TLB/Cam.py similarity index 100% rename from src/TLB/Cam.py rename to src/soc/TLB/Cam.py diff --git a/src/TLB/CamEntry.py b/src/soc/TLB/CamEntry.py similarity index 100% rename from src/TLB/CamEntry.py rename to src/soc/TLB/CamEntry.py diff --git a/src/TLB/LFSR.py b/src/soc/TLB/LFSR.py similarity index 100% rename from src/TLB/LFSR.py rename to src/soc/TLB/LFSR.py diff --git a/src/TLB/LFSR.pyi b/src/soc/TLB/LFSR.pyi similarity index 100% rename from src/TLB/LFSR.pyi rename to src/soc/TLB/LFSR.pyi diff --git a/src/TLB/Makefile b/src/soc/TLB/Makefile similarity index 100% rename from src/TLB/Makefile rename to src/soc/TLB/Makefile diff --git a/src/TLB/MemorySet.py b/src/soc/TLB/MemorySet.py similarity index 100% rename from src/TLB/MemorySet.py rename to src/soc/TLB/MemorySet.py diff --git a/src/TLB/PermissionValidator.py b/src/soc/TLB/PermissionValidator.py similarity index 100% rename from src/TLB/PermissionValidator.py rename to src/soc/TLB/PermissionValidator.py diff --git a/src/TLB/PteEntry.py b/src/soc/TLB/PteEntry.py similarity index 100% rename from src/TLB/PteEntry.py rename to src/soc/TLB/PteEntry.py diff --git a/src/TLB/SetAssociativeCache.py b/src/soc/TLB/SetAssociativeCache.py similarity index 100% rename from src/TLB/SetAssociativeCache.py rename to src/soc/TLB/SetAssociativeCache.py diff --git a/src/TLB/TLB.py b/src/soc/TLB/TLB.py similarity index 100% rename from src/TLB/TLB.py rename to src/soc/TLB/TLB.py diff --git a/src/TLB/__init__.py b/src/soc/TLB/__init__.py similarity index 100% rename from src/TLB/__init__.py rename to src/soc/TLB/__init__.py diff --git a/src/TLB/ariane/TreePLRU.cpp b/src/soc/TLB/ariane/TreePLRU.cpp similarity index 100% rename from src/TLB/ariane/TreePLRU.cpp rename to src/soc/TLB/ariane/TreePLRU.cpp diff --git a/src/TLB/ariane/__init__.py b/src/soc/TLB/ariane/__init__.py similarity index 100% rename from src/TLB/ariane/__init__.py rename to src/soc/TLB/ariane/__init__.py diff --git a/src/TLB/ariane/exceptcause.py b/src/soc/TLB/ariane/exceptcause.py similarity index 100% rename from src/TLB/ariane/exceptcause.py rename to src/soc/TLB/ariane/exceptcause.py diff --git a/src/TLB/ariane/miss_handler.py b/src/soc/TLB/ariane/miss_handler.py similarity index 100% rename from src/TLB/ariane/miss_handler.py rename to src/soc/TLB/ariane/miss_handler.py diff --git a/src/TLB/ariane/mmu.py b/src/soc/TLB/ariane/mmu.py similarity index 100% rename from src/TLB/ariane/mmu.py rename to src/soc/TLB/ariane/mmu.py diff --git a/src/TLB/ariane/p_lru.txt b/src/soc/TLB/ariane/p_lru.txt similarity index 100% rename from src/TLB/ariane/p_lru.txt rename to src/soc/TLB/ariane/p_lru.txt diff --git a/src/TLB/ariane/plru.py b/src/soc/TLB/ariane/plru.py similarity index 100% rename from src/TLB/ariane/plru.py rename to src/soc/TLB/ariane/plru.py diff --git a/src/TLB/ariane/ptw.py b/src/soc/TLB/ariane/ptw.py similarity index 100% rename from src/TLB/ariane/ptw.py rename to src/soc/TLB/ariane/ptw.py diff --git a/src/TLB/ariane/test/test_plru.py b/src/soc/TLB/ariane/test/test_plru.py similarity index 100% rename from src/TLB/ariane/test/test_plru.py rename to src/soc/TLB/ariane/test/test_plru.py diff --git a/src/TLB/ariane/test/test_ptw.py b/src/soc/TLB/ariane/test/test_ptw.py similarity index 100% rename from src/TLB/ariane/test/test_ptw.py rename to src/soc/TLB/ariane/test/test_ptw.py diff --git a/src/TLB/ariane/test/test_tlb.py b/src/soc/TLB/ariane/test/test_tlb.py similarity index 100% rename from src/TLB/ariane/test/test_tlb.py rename to src/soc/TLB/ariane/test/test_tlb.py diff --git a/src/TLB/ariane/test/test_tlb_content.py b/src/soc/TLB/ariane/test/test_tlb_content.py similarity index 100% rename from src/TLB/ariane/test/test_tlb_content.py rename to src/soc/TLB/ariane/test/test_tlb_content.py diff --git a/src/TLB/ariane/tlb.py b/src/soc/TLB/ariane/tlb.py similarity index 100% rename from src/TLB/ariane/tlb.py rename to src/soc/TLB/ariane/tlb.py diff --git a/src/TLB/ariane/tlb_content.py b/src/soc/TLB/ariane/tlb_content.py similarity index 100% rename from src/TLB/ariane/tlb_content.py rename to src/soc/TLB/ariane/tlb_content.py diff --git a/src/TLB/test/__init__.py b/src/soc/TLB/test/__init__.py similarity index 100% rename from src/TLB/test/__init__.py rename to src/soc/TLB/test/__init__.py diff --git a/src/TLB/test/test_LFSR2.py b/src/soc/TLB/test/test_LFSR2.py similarity index 100% rename from src/TLB/test/test_LFSR2.py rename to src/soc/TLB/test/test_LFSR2.py diff --git a/src/TLB/test/test_address_encoder.py b/src/soc/TLB/test/test_address_encoder.py similarity index 100% rename from src/TLB/test/test_address_encoder.py rename to src/soc/TLB/test/test_address_encoder.py diff --git a/src/TLB/test/test_cam.py b/src/soc/TLB/test/test_cam.py similarity index 100% rename from src/TLB/test/test_cam.py rename to src/soc/TLB/test/test_cam.py diff --git a/src/TLB/test/test_cam_entry.py b/src/soc/TLB/test/test_cam_entry.py similarity index 100% rename from src/TLB/test/test_cam_entry.py rename to src/soc/TLB/test/test_cam_entry.py diff --git a/src/TLB/test/test_permission_validator.py b/src/soc/TLB/test/test_permission_validator.py similarity index 100% rename from src/TLB/test/test_permission_validator.py rename to src/soc/TLB/test/test_permission_validator.py diff --git a/src/TLB/test/test_pte_entry.py b/src/soc/TLB/test/test_pte_entry.py similarity index 100% rename from src/TLB/test/test_pte_entry.py rename to src/soc/TLB/test/test_pte_entry.py diff --git a/src/TLB/test/test_set_associative_cache.py b/src/soc/TLB/test/test_set_associative_cache.py similarity index 100% rename from src/TLB/test/test_set_associative_cache.py rename to src/soc/TLB/test/test_set_associative_cache.py diff --git a/src/TLB/test/test_tlb.py b/src/soc/TLB/test/test_tlb.py similarity index 100% rename from src/TLB/test/test_tlb.py rename to src/soc/TLB/test/test_tlb.py diff --git a/src/TestUtil/test_helper.py b/src/soc/TestUtil/test_helper.py similarity index 100% rename from src/TestUtil/test_helper.py rename to src/soc/TestUtil/test_helper.py diff --git a/src/decoder/.gitignore b/src/soc/decoder/.gitignore similarity index 100% rename from src/decoder/.gitignore rename to src/soc/decoder/.gitignore diff --git a/src/decoder/power_decoder.py b/src/soc/decoder/power_decoder.py similarity index 100% rename from src/decoder/power_decoder.py rename to src/soc/decoder/power_decoder.py diff --git a/src/decoder/power_decoder2.py b/src/soc/decoder/power_decoder2.py similarity index 100% rename from src/decoder/power_decoder2.py rename to src/soc/decoder/power_decoder2.py diff --git a/src/decoder/power_enums.py b/src/soc/decoder/power_enums.py similarity index 100% rename from src/decoder/power_enums.py rename to src/soc/decoder/power_enums.py diff --git a/src/decoder/power_fields.py b/src/soc/decoder/power_fields.py similarity index 100% rename from src/decoder/power_fields.py rename to src/soc/decoder/power_fields.py diff --git a/src/decoder/power_fieldsn.py b/src/soc/decoder/power_fieldsn.py similarity index 100% rename from src/decoder/power_fieldsn.py rename to src/soc/decoder/power_fieldsn.py diff --git a/src/decoder/test/test_power_decoder.py b/src/soc/decoder/test/test_power_decoder.py similarity index 100% rename from src/decoder/test/test_power_decoder.py rename to src/soc/decoder/test/test_power_decoder.py diff --git a/src/experiment/alu_hier.py b/src/soc/experiment/alu_hier.py similarity index 100% rename from src/experiment/alu_hier.py rename to src/soc/experiment/alu_hier.py diff --git a/src/experiment/compalu.py b/src/soc/experiment/compalu.py similarity index 100% rename from src/experiment/compalu.py rename to src/soc/experiment/compalu.py diff --git a/src/experiment/compldst.py b/src/soc/experiment/compldst.py similarity index 100% rename from src/experiment/compldst.py rename to src/soc/experiment/compldst.py diff --git a/src/experiment/cscore.py b/src/soc/experiment/cscore.py similarity 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