From 2d2b384066cb19d18592a974e4fe4ca16635103d Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Wed, 10 Aug 2016 12:21:53 +0200 Subject: [PATCH] radeonsi: don't set CB_COLOR1_INFO for dual src blending MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Vulkan doesn't do this. The reason may be that CB_COLOR1_INFO.SOURCE_FORMAT from NI was moved to SPI_SHADER_COL_FORMAT for SI. I asked CB guys about this 2 days ago and they still haven't replied. Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_state.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 5d554486cb7..a44f977402a 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -2507,13 +2507,6 @@ static void si_emit_framebuffer_state(struct si_context *sctx, struct r600_atom tex->dcc_offset + tex->surface.level[cb->base.u.tex.level].dcc_offset) >> 8); } - /* set CB_COLOR1_INFO for possible dual-src blending */ - if (i == 1 && state->cbufs[0] && - sctx->framebuffer.dirty_cbufs & (1 << 0)) { - radeon_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + 1 * 0x3C, - cb_color_info); - i++; - } for (; i < 8 ; i++) if (sctx->framebuffer.dirty_cbufs & (1 << i)) radeon_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C, 0); -- 2.30.2