From 2d590ab09c2931ab634379b63644855f2e789ded Mon Sep 17 00:00:00 2001 From: Segher Boessenkool Date: Thu, 30 Jul 2015 04:34:09 +0200 Subject: [PATCH] re PR target/66217 (PowerPC rotate/shift/mask instructions not optimal) PR target/66217 PR target/67045 * config/rs6000/rs6000.md (and3): Put a CONST_INT_P check around those cases that need one. From-SVN: r226378 --- gcc/ChangeLog | 7 +++++++ gcc/config/rs6000/rs6000.md | 35 +++++++++++++++++++---------------- 2 files changed, 26 insertions(+), 16 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f4a50610f84..d1a9600ae8a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2015-07-29 Segher Boessenkool + + PR target/66217 + PR target/67045 + * config/rs6000/rs6000.md (and3): Put a CONST_INT_P check + around those cases that need one. + 2015-07-29 Aditya Kumar * params.def (PARAM_GRAPHITE_MAX_NB_SCOP_PARAMS): Default to 3. diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index f7fa3996b98..527ad985423 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -2898,26 +2898,29 @@ DONE; } - if (rs6000_is_valid_and_mask (operands[2], mode)) + if (CONST_INT_P (operands[2])) { - emit_insn (gen_and3_mask (operands[0], operands[1], operands[2])); - DONE; - } + if (rs6000_is_valid_and_mask (operands[2], mode)) + { + emit_insn (gen_and3_mask (operands[0], operands[1], operands[2])); + DONE; + } - if (logical_const_operand (operands[2], mode) - && rs6000_gen_cell_microcode) - { - emit_insn (gen_and3_imm (operands[0], operands[1], operands[2])); - DONE; - } + if (logical_const_operand (operands[2], mode) + && rs6000_gen_cell_microcode) + { + emit_insn (gen_and3_imm (operands[0], operands[1], operands[2])); + DONE; + } - if (rs6000_is_valid_2insn_and (operands[2], mode)) - { - rs6000_emit_2insn_and (mode, operands, true, 0); - DONE; - } + if (rs6000_is_valid_2insn_and (operands[2], mode)) + { + rs6000_emit_2insn_and (mode, operands, true, 0); + DONE; + } - operands[2] = force_reg (mode, operands[2]); + operands[2] = force_reg (mode, operands[2]); + } }) -- 2.30.2