From 2d64948555aa26cc9c51fa2f6b580612902bab2a Mon Sep 17 00:00:00 2001
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 4 Dec 2018 08:04:20 +0000
Subject: [PATCH] record conversation snippet

---
 3d_gpu/microarchitecture.mdwn | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/3d_gpu/microarchitecture.mdwn b/3d_gpu/microarchitecture.mdwn
index f2c363d42..d22e36e76 100644
--- a/3d_gpu/microarchitecture.mdwn
+++ b/3d_gpu/microarchitecture.mdwn
@@ -165,6 +165,18 @@ be pending
   written to by an earlier store cannot perform the memory access until
   the store has written the data.
 
+Advantages of Speculation, Load and Store hazards:
+
+* A store updates memoryy only when it reached the head of the ROB
+* WAW and WAR type of hazards are eliminated with speculation
+  (actual updating of memory occurs in order)
+* RAW hazards through memory are maintained by not allowing a load
+  to initiate the second step of its execution
+* Check if any store has a destination field that matched the
+  value of the load:
+    - SD F1 100(R2)
+    - LD F2 100(R2)
+
 # References
 
 * <https://en.wikipedia.org/wiki/Tomasulo_algorithm>
-- 
2.30.2