From 2d6d3461d307636b61d0f483677aaad11d1fd42a Mon Sep 17 00:00:00 2001 From: =?utf8?q?Kristian=20H=C3=B8gsberg?= Date: Fri, 5 Sep 2014 10:53:48 -0700 Subject: [PATCH] i965: Adjust fast-clear resolve rect for BDW MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The scale factors for the resolve rectangle change for BDW and we have to look at brw->gen now to figure out how big it should be. Fixes: https://bugs.freedesktop.org/attachment.cgi?id=105777 Cc: "10.3" Signed-off-by: Kristian Høgsberg Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c index 168e5b11d2c..b4e75a76bd1 100644 --- a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c +++ b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c @@ -641,13 +641,19 @@ get_resolve_rect(struct brw_context *brw, * with respect to render target being resolved. * * The scaledown factors in the table that follows are related to the - * alignment size returned by intel_get_non_msrt_mcs_alignment(), but with - * X and Y alignment each divided by 2. + * alignment size returned by intel_get_non_msrt_mcs_alignment() by a + * multiplier. For IVB and HSW, we divide by two, for BDW we multiply + * by 8 and 16. */ intel_get_non_msrt_mcs_alignment(brw, mt, &x_align, &y_align); - x_scaledown = x_align / 2; - y_scaledown = y_align / 2; + if (brw->gen >= 8) { + x_scaledown = x_align * 8; + y_scaledown = y_align * 16; + } else { + x_scaledown = x_align / 2; + y_scaledown = y_align / 2; + } rect->x0 = rect->y0 = 0; rect->x1 = ALIGN(mt->logical_width0, x_scaledown) / x_scaledown; rect->y1 = ALIGN(mt->logical_height0, y_scaledown) / y_scaledown; -- 2.30.2