From 2d8fbebdb1eaca8de557ab3052535a8e4b8f8972 Mon Sep 17 00:00:00 2001 From: Kyrylo Tkachov Date: Wed, 30 Sep 2020 12:01:23 +0100 Subject: [PATCH] PR target/97150 AArch64: 2nd parameter of unsigned Neon scalar shift intrinsics should be signed In this PR the second argument to the intrinsics should be signed but we use an unsigned one erroneously. The corresponding builtins are already using the correct types so it's just a matter of correcting the signatures in arm_neon.h gcc/ PR target/97150 * config/aarch64/arm_neon.h (vqrshlb_u8): Make second argument signed. (vqrshlh_u16): Likewise. (vqrshls_u32): Likewise. (vqrshld_u64): Likewise. (vqshlb_u8): Likewise. (vqshlh_u16): Likewise. (vqshls_u32): Likewise. (vqshld_u64): Likewise. (vshld_u64): Likewise. gcc/testsuite/ PR target/97150 * gcc.target/aarch64/pr97150.c: New test. --- gcc/config/aarch64/arm_neon.h | 18 +++++++++--------- gcc/testsuite/gcc.target/aarch64/pr97150.c | 14 ++++++++++++++ 2 files changed, 23 insertions(+), 9 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/pr97150.c diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index 6729fb5acac..d943f63a274 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -24337,28 +24337,28 @@ vqrshld_s64 (int64_t __a, int64_t __b) __extension__ extern __inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vqrshlb_u8 (uint8_t __a, uint8_t __b) +vqrshlb_u8 (uint8_t __a, int8_t __b) { return __builtin_aarch64_uqrshlqi_uus (__a, __b); } __extension__ extern __inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vqrshlh_u16 (uint16_t __a, uint16_t __b) +vqrshlh_u16 (uint16_t __a, int16_t __b) { return __builtin_aarch64_uqrshlhi_uus (__a, __b); } __extension__ extern __inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vqrshls_u32 (uint32_t __a, uint32_t __b) +vqrshls_u32 (uint32_t __a, int32_t __b) { return __builtin_aarch64_uqrshlsi_uus (__a, __b); } __extension__ extern __inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vqrshld_u64 (uint64_t __a, uint64_t __b) +vqrshld_u64 (uint64_t __a, int64_t __b) { return __builtin_aarch64_uqrshldi_uus (__a, __b); } @@ -24637,28 +24637,28 @@ vqshld_s64 (int64_t __a, int64_t __b) __extension__ extern __inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vqshlb_u8 (uint8_t __a, uint8_t __b) +vqshlb_u8 (uint8_t __a, int8_t __b) { return __builtin_aarch64_uqshlqi_uus (__a, __b); } __extension__ extern __inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vqshlh_u16 (uint16_t __a, uint16_t __b) +vqshlh_u16 (uint16_t __a, int16_t __b) { return __builtin_aarch64_uqshlhi_uus (__a, __b); } __extension__ extern __inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vqshls_u32 (uint32_t __a, uint32_t __b) +vqshls_u32 (uint32_t __a, int32_t __b) { return __builtin_aarch64_uqshlsi_uus (__a, __b); } __extension__ extern __inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vqshld_u64 (uint64_t __a, uint64_t __b) +vqshld_u64 (uint64_t __a, int64_t __b) { return __builtin_aarch64_uqshldi_uus (__a, __b); } @@ -26999,7 +26999,7 @@ vshld_s64 (int64_t __a, int64_t __b) __extension__ extern __inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vshld_u64 (uint64_t __a, uint64_t __b) +vshld_u64 (uint64_t __a, int64_t __b) { return __builtin_aarch64_ushldi_uus (__a, __b); } diff --git a/gcc/testsuite/gcc.target/aarch64/pr97150.c b/gcc/testsuite/gcc.target/aarch64/pr97150.c new file mode 100644 index 00000000000..7abdd8cf347 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr97150.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ + +#include + +uint8_t (*fp0)(uint8_t, int8_t) = vqshlb_u8; +uint16_t (*fp1)(uint16_t, int16_t) = vqshlh_u16; +uint32_t (*fp2)(uint32_t, int32_t) = vqshls_u32; +uint64_t (*fp3)(uint64_t, int64_t) = vqshld_u64; +uint8_t (*fp4)(uint8_t, int8_t) = vqrshlb_u8; +uint16_t (*fp5)(uint16_t, int16_t) = vqrshlh_u16; +uint32_t (*fp6)(uint32_t, int32_t) = vqrshls_u32; +uint64_t (*fp7)(uint64_t, int64_t) = vqrshld_u64; +uint64_t (*fp8)(uint64_t, int64_t) = vshld_u64; + -- 2.30.2