From 2d95a7da9cd2e8cf1854215241c5df7d67ca0c1e Mon Sep 17 00:00:00 2001 From: Claire Xenia Wolf Date: Wed, 9 Jun 2021 12:42:52 +0200 Subject: [PATCH] Intersynth URL Signed-off-by: Claire Xenia Wolf --- backends/intersynth/intersynth.cc | 2 +- manual/command-reference-manual.tex | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/backends/intersynth/intersynth.cc b/backends/intersynth/intersynth.cc index 758a8792b..59173c4a2 100644 --- a/backends/intersynth/intersynth.cc +++ b/backends/intersynth/intersynth.cc @@ -68,7 +68,7 @@ struct IntersynthBackend : public Backend { log(" only write selected modules. modules must be selected entirely or\n"); log(" not at all.\n"); log("\n"); - log("http://www.clifford.at/intersynth/\n"); + log("http://bygone.clairexen.net/intersynth/\n"); log("\n"); } void execute(std::ostream *&f, std::string filename, std::vector args, RTLIL::Design *design) override diff --git a/manual/command-reference-manual.tex b/manual/command-reference-manual.tex index a3264b4cd..960078cc7 100644 --- a/manual/command-reference-manual.tex +++ b/manual/command-reference-manual.tex @@ -6999,7 +6999,7 @@ a tool for Coarse-Grain Example-Driven Interconnect Synthesis. only write selected modules. modules must be selected entirely or not at all. -http://www.clifford.at/intersynth/ +http://bygone.clairexen.net/intersynth/ \end{lstlisting} \section{write\_json -- write design to a JSON file} -- 2.30.2