From 2e48ab568bbc58ea459d21b70a395e1238aadf4b Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Fri, 27 Mar 2020 18:44:48 +0100 Subject: [PATCH] soc/cores/spi: make dynamic clk divider optional (can be enabled with add_clk_divider method) and only use it in add_spi_sdcard. --- litex/soc/cores/spi.py | 6 ++++-- litex/soc/integration/soc.py | 1 + 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/litex/soc/cores/spi.py b/litex/soc/cores/spi.py index 58f3b6ca..afa0b950 100644 --- a/litex/soc/cores/spi.py +++ b/litex/soc/cores/spi.py @@ -137,7 +137,6 @@ class SPIMaster(Module, AutoCSR): CSRField("sel", len(self.cs), reset=1, description="Write ``1`` to corresponding bit to enable Xfer for chip.") ], description="SPI Chip Select.") self._loopback = CSRStorage(description="SPI loopback mode.\n\n Write ``1`` to enable MOSI to MISO internal loopback.") - self._clk_divider = CSRStorage(16, description="SPI Clk Divider.", reset=self.clk_divider.reset) self.comb += [ self.start.eq(self._control.fields.start), @@ -145,12 +144,15 @@ class SPIMaster(Module, AutoCSR): self.mosi.eq(self._mosi.storage), self.cs.eq(self._cs.storage), self.loopback.eq(self._loopback.storage), - self.clk_divider.eq(self._clk_divider.storage), self._status.fields.done.eq(self.done), self._miso.status.eq(self.miso), ] + def add_clk_divider(self): + self._clk_divider = CSRStorage(16, description="SPI Clk Divider.", reset=self.clk_divider.reset) + self.comb += self.clk_divider.eq(self._clk_divider.storage) + # SPI Slave ---------------------------------------------------------------------------------------- class SPISlave(Module): diff --git a/litex/soc/integration/soc.py b/litex/soc/integration/soc.py index fb2bfb74..b06abdef 100644 --- a/litex/soc/integration/soc.py +++ b/litex/soc/integration/soc.py @@ -1154,5 +1154,6 @@ class LiteXSoC(SoC): if hasattr(pads, "rst"): self.comb += pads.rst.eq(0) spisdcard = SPIMaster(pads, 8, self.sys_clk_freq, 400e3) + spisdcard.add_clk_divider() setattr(self.submodules, name, spisdcard) self.add_csr(name) -- 2.30.2