From 2e4cc47fcb5de1c2f5b64bf060fe87accff90d3c Mon Sep 17 00:00:00 2001 From: whitequark Date: Wed, 3 Jul 2019 16:34:31 +0000 Subject: [PATCH] hdl.dsl: fix src_loc_at for FSM state signal. --- nmigen/hdl/dsl.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/nmigen/hdl/dsl.py b/nmigen/hdl/dsl.py index 5c39482..5b82089 100644 --- a/nmigen/hdl/dsl.py +++ b/nmigen/hdl/dsl.py @@ -248,7 +248,7 @@ class Module(_ModuleBuilderRoot, Elaboratable): self._check_context("FSM", context=None) fsm_data = self._set_ctrl("FSM", { "name": name, - "signal": Signal(name="{}_state".format(name)), + "signal": Signal(name="{}_state".format(name), src_loc_at=2), "reset": reset, "domain": domain, "encoding": OrderedDict(), -- 2.30.2