From 2e939ee97029f228237fc2a2910c2240b93635ff Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hongjiu.lu@intel.com>
Date: Mon, 28 Mar 2011 02:49:34 +0000
Subject: [PATCH] Don't assert unaligned 256bit load/store.

2011-03-27  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/sse.md (*avx_mov<mode>_internal): Don't assert
	unaligned 256bit load/store.
	(*avx_movu<ssemodesuffix><avxmodesuffix>): Likewise.
	(*avx_movdqu<avxmodesuffix>): Likewise.

From-SVN: r171590
---
 gcc/ChangeLog          |  7 +++++++
 gcc/config/i386/sse.md | 26 ++------------------------
 2 files changed, 9 insertions(+), 24 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d8bf12e4d34..e9166cf4e93 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2011-03-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/i386/sse.md (*avx_mov<mode>_internal): Don't assert
+	unaligned 256bit load/store.
+	(*avx_movu<ssemodesuffix><avxmodesuffix>): Likewise.
+	(*avx_movdqu<avxmodesuffix>): Likewise.
+
 2011-03-27  Vladimir Makarov  <vmakarov@redhat.com>
 
 	PR bootstrap/48307
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index de11f7362ec..4c22bc5df68 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -203,12 +203,6 @@
       return standard_sse_constant_opcode (insn, operands[1]);
     case 1:
     case 2:
-      if (GET_MODE_ALIGNMENT (<MODE>mode) == 256
-	  && ((TARGET_AVX256_SPLIT_UNALIGNED_STORE
-	       && misaligned_operand (operands[0], <MODE>mode))
-	      || (TARGET_AVX256_SPLIT_UNALIGNED_LOAD
-		  && misaligned_operand (operands[1], <MODE>mode))))
-	gcc_unreachable ();
       switch (get_attr_mode (insn))
         {
 	case MODE_V8SF:
@@ -416,15 +410,7 @@
 	  UNSPEC_MOVU))]
   "AVX_VEC_FLOAT_MODE_P (<MODE>mode)
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
-{
-  if (GET_MODE_ALIGNMENT (<MODE>mode) == 256
-      && ((TARGET_AVX256_SPLIT_UNALIGNED_STORE
-	   && misaligned_operand (operands[0], <MODE>mode))
-	  || (TARGET_AVX256_SPLIT_UNALIGNED_LOAD
-	      && misaligned_operand (operands[1], <MODE>mode))))
-    gcc_unreachable ();
-  return "vmovu<ssemodesuffix>\t{%1, %0|%0, %1}";
-}
+  "vmovu<ssemodesuffix>\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssemov")
    (set_attr "movu" "1")
    (set_attr "prefix" "vex")
@@ -483,15 +469,7 @@
 	  [(match_operand:AVXMODEQI 1 "nonimmediate_operand" "xm,x")]
 	  UNSPEC_MOVU))]
   "TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
-{
-  if (GET_MODE_ALIGNMENT (<MODE>mode) == 256
-      && ((TARGET_AVX256_SPLIT_UNALIGNED_STORE
-	   && misaligned_operand (operands[0], <MODE>mode))
-	  || (TARGET_AVX256_SPLIT_UNALIGNED_LOAD
-	      && misaligned_operand (operands[1], <MODE>mode))))
-    gcc_unreachable ();
-  return "vmovdqu\t{%1, %0|%0, %1}";
-}
+  "vmovdqu\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssemov")
    (set_attr "movu" "1")
    (set_attr "prefix" "vex")
-- 
2.30.2