From 2eba3e03c360947e3e73acc788a1ad4be11b9381 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 26 Jul 2020 14:16:15 +0100 Subject: [PATCH] add test_nop general test case --- src/soc/simulator/test_sim.py | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/soc/simulator/test_sim.py b/src/soc/simulator/test_sim.py index 30045ac6..b506b4f7 100644 --- a/src/soc/simulator/test_sim.py +++ b/src/soc/simulator/test_sim.py @@ -203,6 +203,15 @@ class GeneralTestCases(FHDLTestCase): with Program(lst, bigendian) as program: self.run_tst_program(program, [1, 2, 3, 4], initial_mem) + def test_nop(self): + lst = ["addi 1, 0, 0x1004", + "nop", + "addi 3, 0, 0x15eb", + ] + initial_regs = [0] * 32 + with Program(lst, bigendian) as program: + self.run_tst_program(program, [1, 3]) + def test_loop(self): """in godbolt.org: register unsigned long i asm ("r12"); -- 2.30.2