From 2eeccc50543f271f67cd1759ffdf551a8a726c73 Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Tue, 21 Aug 2018 11:04:15 +0200
Subject: [PATCH] vexriscv: update

---
 litex/soc/cores/cpu/vexriscv/verilog | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/litex/soc/cores/cpu/vexriscv/verilog b/litex/soc/cores/cpu/vexriscv/verilog
index 3b5b0e7c..e8a30b95 160000
--- a/litex/soc/cores/cpu/vexriscv/verilog
+++ b/litex/soc/cores/cpu/vexriscv/verilog
@@ -1 +1 @@
-Subproject commit 3b5b0e7c13ae2b7874fac40cbb3c4dc75deb1e1d
+Subproject commit e8a30b95b9aa1445b5a4a76579a98a0552e2db53
-- 
2.30.2